From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Wed, 31 May 2023 20:40:39 +0000 (+0300)
Subject: power_enums: introduce register aliases
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eecc02e23b6996fd75994916158a9a048c3b8717;p=openpower-isa.git

power_enums: introduce register aliases
---

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 56518d86..3b529434 100644
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -304,6 +304,28 @@ class SVExtraReg(Enum):
 
         return cls.__members__.get(desc)
 
+    @property
+    def alias(self):
+        alias = {
+            Reg.RSp: Reg.RS,
+            Reg.RTp: Reg.RT,
+            Reg.FRAp: Reg.FRA,
+            Reg.FRBp: Reg.FRB,
+            Reg.FRSp: Reg.FRS,
+            Reg.FRTp: Reg.FRT,
+        }.get(self)
+        if alias is not None:
+            return alias
+
+        alias = {
+            Reg.RA_OR_ZERO: Reg.RA,
+            Reg.RT_OR_ZERO: Reg.RT,
+        }.get(self)
+        if alias is not None:
+            return alias
+
+        return self
+
 
 @unique
 class SVP64PredMode(Enum):