From: Alexander Ivchenko Date: Wed, 29 Oct 2014 07:13:01 +0000 (+0000) Subject: AVX-512. 88/n. Add missed avx512bw/avx512vl cmp intrinsics. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eee5d6f5271132ac65553c0accae401f17f91182;p=gcc.git AVX-512. 88/n. Add missed avx512bw/avx512vl cmp intrinsics. gcc/ * config/i386/avx512bwintrin.h: Add new intrinsics. * config/i386/avx512vlbwintrin.h: Ditto. * config/i386/avx512vlintrin.h: Ditto. gcc/testsuite/ * gcc.target/i386/avx512bw-vpcmpequb-1.c: New. * gcc.target/i386/avx512bw-vpcmpequb-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpequw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpequw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgeb-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgeb-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgeub-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgeub-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgeuw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgeuw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgew-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgew-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgtub-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgtub-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgtuw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpgtuw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpleb-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpleb-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpleub-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpleub-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpleuw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpleuw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmplew-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmplew-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltb-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltb-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltub-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltub-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltuw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltuw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpltw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpneqb-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpneqb-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpnequb-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpnequb-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpnequw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpnequw-2.c: Ditto. * gcc.target/i386/avx512bw-vpcmpneqw-1.c: Ditto. * gcc.target/i386/avx512bw-vpcmpneqw-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpequb-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpequd-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpequd-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpequq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpequq-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpequw-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpged-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgeq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgeud-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgeuq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgtub-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgtud-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgtud-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgtuq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgtuq-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpgtuw-2.c: Ditto. * gcc.target/i386/avx512vl-vpcmpled-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpleq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpleud-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpleuq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpltd-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpltq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpltud-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpltuq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpneqd-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpneqq-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpnequd-1.c: Ditto. * gcc.target/i386/avx512vl-vpcmpnequq-1.c: Ditto. Co-Authored-By: Andrey Turetskiy Co-Authored-By: Anna Tikhonova Co-Authored-By: Ilya Tocar Co-Authored-By: Ilya Verbin Co-Authored-By: Kirill Yukhin Co-Authored-By: Maxim Kuznetsov Co-Authored-By: Michael Zolotukhin From-SVN: r216819 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a2f87f76557..e28043f2225 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2014-10-29 Alexander Ivchenko + Maxim Kuznetsov + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * config/i386/avx512bwintrin.h: Add new intrinsics. + * config/i386/avx512vlbwintrin.h: Ditto. + * config/i386/avx512vlintrin.h: Ditto. + 2014-10-28 Dominik Vogt * godump.c (precision_to_units): New helper function. diff --git a/gcc/config/i386/avx512bwintrin.h b/gcc/config/i386/avx512bwintrin.h index 47b3f50749f..d70cae0e9a0 100644 --- a/gcc/config/i386/avx512bwintrin.h +++ b/gcc/config/i386/avx512bwintrin.h @@ -1373,6 +1373,15 @@ _mm512_maskz_unpacklo_epi16 (__mmask32 __U, __m512i __A, __m512i __B) (__mmask32) __U); } +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpeq_epu8_mask (__m512i __A, __m512i __B) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A, + (__v64qi) __B, 0, + (__mmask64) -1); +} + extern __inline __mmask64 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpeq_epi8_mask (__m512i __A, __m512i __B) @@ -1382,6 +1391,15 @@ _mm512_cmpeq_epi8_mask (__m512i __A, __m512i __B) (__mmask64) -1); } +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpeq_epu8_mask (__mmask64 __U, __m512i __A, __m512i __B) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A, + (__v64qi) __B, 0, + __U); +} + extern __inline __mmask64 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_cmpeq_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B) @@ -1391,6 +1409,15 @@ _mm512_mask_cmpeq_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B) __U); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpeq_epu16_mask (__m512i __A, __m512i __B) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A, + (__v32hi) __B, 0, + (__mmask32) -1); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpeq_epi16_mask (__m512i __A, __m512i __B) @@ -1400,6 +1427,15 @@ _mm512_cmpeq_epi16_mask (__m512i __A, __m512i __B) (__mmask32) -1); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpeq_epu16_mask (__mmask32 __U, __m512i __A, __m512i __B) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A, + (__v32hi) __B, 0, + __U); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_cmpeq_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B) @@ -1409,6 +1445,15 @@ _mm512_mask_cmpeq_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B) __U); } +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpgt_epu8_mask (__m512i __A, __m512i __B) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A, + (__v64qi) __B, 6, + (__mmask64) -1); +} + extern __inline __mmask64 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpgt_epi8_mask (__m512i __A, __m512i __B) @@ -1418,6 +1463,15 @@ _mm512_cmpgt_epi8_mask (__m512i __A, __m512i __B) (__mmask64) -1); } +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpgt_epu8_mask (__mmask64 __U, __m512i __A, __m512i __B) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A, + (__v64qi) __B, 6, + __U); +} + extern __inline __mmask64 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_cmpgt_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B) @@ -1427,6 +1481,15 @@ _mm512_mask_cmpgt_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B) __U); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpgt_epu16_mask (__m512i __A, __m512i __B) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A, + (__v32hi) __B, 6, + (__mmask32) -1); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_cmpgt_epi16_mask (__m512i __A, __m512i __B) @@ -1436,6 +1499,15 @@ _mm512_cmpgt_epi16_mask (__m512i __A, __m512i __B) (__mmask32) -1); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpgt_epu16_mask (__mmask32 __U, __m512i __A, __m512i __B) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A, + (__v32hi) __B, 6, + __U); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_cmpgt_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B) @@ -2083,6 +2155,294 @@ _mm512_maskz_abs_epi16 (__mmask32 __U, __m512i __A) (__mmask32) __U); } +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 4, + (__mmask64) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 1, + (__mmask64) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 5, + (__mmask64) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 2, + (__mmask64) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 4, + (__mmask32) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 1, + (__mmask32) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 5, + (__mmask32) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 2, + (__mmask32) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 4, + (__mmask64) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 1, + (__mmask64) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 5, + (__mmask64) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 2, + (__mmask64) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpneq_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 4, + (__mmask32) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmplt_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 1, + (__mmask32) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmpge_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 5, + (__mmask32) __M); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_cmple_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 2, + (__mmask32) __M); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpneq_epu8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 4, + (__mmask64) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmplt_epu8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 1, + (__mmask64) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpge_epu8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 5, + (__mmask64) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmple_epu8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 2, + (__mmask64) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpneq_epu16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 4, + (__mmask32) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmplt_epu16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 1, + (__mmask32) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpge_epu16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 5, + (__mmask32) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmple_epu16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 2, + (__mmask32) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpneq_epi8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 4, + (__mmask64) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmplt_epi8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 1, + (__mmask64) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpge_epi8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 5, + (__mmask64) - 1); +} + +extern __inline __mmask64 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmple_epi8_mask (__m512i __X, __m512i __Y) +{ + return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X, + (__v64qi) __Y, 2, + (__mmask64) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpneq_epi16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 4, + (__mmask32) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmplt_epi16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 1, + (__mmask32) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmpge_epi16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 5, + (__mmask32) - 1); +} + +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_cmple_epi16_mask (__m512i __X, __m512i __Y) +{ + return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X, + (__v32hi) __Y, 2, + (__mmask32) - 1); +} + #ifdef __OPTIMIZE__ extern __inline __m512i __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) diff --git a/gcc/config/i386/avx512vlbwintrin.h b/gcc/config/i386/avx512vlbwintrin.h index 1a4fe2ca2c6..a2255800cc7 100644 --- a/gcc/config/i386/avx512vlbwintrin.h +++ b/gcc/config/i386/avx512vlbwintrin.h @@ -3053,6 +3053,24 @@ _mm_cmpeq_epi8_mask (__m128i __A, __m128i __B) (__mmask16) -1); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpeq_epu8_mask (__m128i __A, __m128i __B) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A, + (__v16qi) __B, 0, + (__mmask16) -1); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpeq_epu8_mask (__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A, + (__v16qi) __B, 0, + __U); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpeq_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) @@ -3062,6 +3080,15 @@ _mm_mask_cmpeq_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) __U); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpeq_epu8_mask (__m256i __A, __m256i __B) +{ + return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A, + (__v32qi) __B, 0, + (__mmask32) -1); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpeq_epi8_mask (__m256i __A, __m256i __B) @@ -3071,6 +3098,15 @@ _mm256_cmpeq_epi8_mask (__m256i __A, __m256i __B) (__mmask32) -1); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpeq_epu8_mask (__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A, + (__v32qi) __B, 0, + __U); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpeq_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B) @@ -3080,6 +3116,15 @@ _mm256_mask_cmpeq_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B) __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpeq_epu16_mask (__m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A, + (__v8hi) __B, 0, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpeq_epi16_mask (__m128i __A, __m128i __B) @@ -3089,6 +3134,14 @@ _mm_cmpeq_epi16_mask (__m128i __A, __m128i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpeq_epu16_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A, + (__v8hi) __B, 0, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpeq_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B) @@ -3097,6 +3150,15 @@ _mm_mask_cmpeq_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B) (__v8hi) __B, __U); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpeq_epu16_mask (__m256i __A, __m256i __B) +{ + return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A, + (__v16hi) __B, 0, + (__mmask16) -1); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpeq_epi16_mask (__m256i __A, __m256i __B) @@ -3106,6 +3168,15 @@ _mm256_cmpeq_epi16_mask (__m256i __A, __m256i __B) (__mmask16) -1); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpeq_epu16_mask (__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A, + (__v16hi) __B, 0, + __U); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpeq_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) @@ -3115,6 +3186,15 @@ _mm256_mask_cmpeq_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) __U); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpgt_epu8_mask (__m128i __A, __m128i __B) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A, + (__v16qi) __B, 6, + (__mmask16) -1); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi8_mask (__m128i __A, __m128i __B) @@ -3124,6 +3204,15 @@ _mm_cmpgt_epi8_mask (__m128i __A, __m128i __B) (__mmask16) -1); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpgt_epu8_mask (__mmask16 __U, __m128i __A, __m128i __B) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A, + (__v16qi) __B, 6, + __U); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpgt_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) @@ -3133,6 +3222,15 @@ _mm_mask_cmpgt_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) __U); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpgt_epu8_mask (__m256i __A, __m256i __B) +{ + return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A, + (__v32qi) __B, 6, + (__mmask32) -1); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpgt_epi8_mask (__m256i __A, __m256i __B) @@ -3142,6 +3240,15 @@ _mm256_cmpgt_epi8_mask (__m256i __A, __m256i __B) (__mmask32) -1); } +extern __inline __mmask32 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpgt_epu8_mask (__mmask32 __U, __m256i __A, __m256i __B) +{ + return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A, + (__v32qi) __B, 6, + __U); +} + extern __inline __mmask32 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpgt_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B) @@ -3151,6 +3258,15 @@ _mm256_mask_cmpgt_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B) __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpgt_epu16_mask (__m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A, + (__v8hi) __B, 6, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi16_mask (__m128i __A, __m128i __B) @@ -3160,6 +3276,14 @@ _mm_cmpgt_epi16_mask (__m128i __A, __m128i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpgt_epu16_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A, + (__v8hi) __B, 6, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpgt_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B) @@ -3168,6 +3292,15 @@ _mm_mask_cmpgt_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B) (__v8hi) __B, __U); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpgt_epu16_mask (__m256i __A, __m256i __B) +{ + return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A, + (__v16hi) __B, 6, + (__mmask16) -1); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpgt_epi16_mask (__m256i __A, __m256i __B) @@ -3177,6 +3310,15 @@ _mm256_cmpgt_epi16_mask (__m256i __A, __m256i __B) (__mmask16) -1); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpgt_epu16_mask (__mmask16 __U, __m256i __A, __m256i __B) +{ + return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A, + (__v16hi) __B, 6, + __U); +} + extern __inline __mmask16 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpgt_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) @@ -4216,6 +4358,294 @@ _mm_mask_packs_epi32 (__m128i __W, __mmask16 __M, __m128i __A, (__v8hi) __W, __M); } +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 4, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 1, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 5, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 2, + (__mmask16) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 4, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 1, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 5, + (__mmask16) __M); +} + +extern __inline __mmask16 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y) +{ + return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X, + (__v16qi) __Y, 2, + (__mmask16) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X, + (__v8hi) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X, + (__v32qi) __Y, 2, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 4, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 1, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 5, + (__mmask8) __M); +} + +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X, + (__v16hi) __Y, 2, + (__mmask8) __M); +} + #ifdef __DISABLE_AVX512VLBW__ #undef __DISABLE_AVX512VLBW__ #pragma GCC pop_options diff --git a/gcc/config/i386/avx512vlintrin.h b/gcc/config/i386/avx512vlintrin.h index 2f5e048f3a8..f39f7f386af 100644 --- a/gcc/config/i386/avx512vlintrin.h +++ b/gcc/config/i386/avx512vlintrin.h @@ -5358,6 +5358,15 @@ _mm256_maskz_unpacklo_epi64 (__mmask8 __U, __m256i __A, __m256i __B) (__mmask8) __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpeq_epu32_mask (__m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A, + (__v4si) __B, 0, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpeq_epi32_mask (__m128i __A, __m128i __B) @@ -5367,6 +5376,14 @@ _mm_cmpeq_epi32_mask (__m128i __A, __m128i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpeq_epu32_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A, + (__v4si) __B, 0, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpeq_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B) @@ -5375,6 +5392,15 @@ _mm_mask_cmpeq_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B) (__v4si) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpeq_epu32_mask (__m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A, + (__v8si) __B, 0, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpeq_epi32_mask (__m256i __A, __m256i __B) @@ -5384,6 +5410,14 @@ _mm256_cmpeq_epi32_mask (__m256i __A, __m256i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpeq_epu32_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A, + (__v8si) __B, 0, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpeq_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B) @@ -5392,6 +5426,15 @@ _mm256_mask_cmpeq_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B) (__v8si) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpeq_epu64_mask (__m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A, + (__v2di) __B, 0, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpeq_epi64_mask (__m128i __A, __m128i __B) @@ -5401,6 +5444,14 @@ _mm_cmpeq_epi64_mask (__m128i __A, __m128i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpeq_epu64_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A, + (__v2di) __B, 0, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpeq_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B) @@ -5409,6 +5460,15 @@ _mm_mask_cmpeq_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B) (__v2di) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpeq_epu64_mask (__m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A, + (__v4di) __B, 0, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpeq_epi64_mask (__m256i __A, __m256i __B) @@ -5418,6 +5478,14 @@ _mm256_cmpeq_epi64_mask (__m256i __A, __m256i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpeq_epu64_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A, + (__v4di) __B, 0, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpeq_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B) @@ -5426,6 +5494,15 @@ _mm256_mask_cmpeq_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B) (__v4di) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpgt_epu32_mask (__m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A, + (__v4si) __B, 6, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi32_mask (__m128i __A, __m128i __B) @@ -5435,6 +5512,14 @@ _mm_cmpgt_epi32_mask (__m128i __A, __m128i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpgt_epu32_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A, + (__v4si) __B, 6, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpgt_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B) @@ -5443,6 +5528,15 @@ _mm_mask_cmpgt_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B) (__v4si) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpgt_epu32_mask (__m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A, + (__v8si) __B, 6, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpgt_epi32_mask (__m256i __A, __m256i __B) @@ -5452,6 +5546,14 @@ _mm256_cmpgt_epi32_mask (__m256i __A, __m256i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpgt_epu32_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A, + (__v8si) __B, 6, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpgt_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B) @@ -5460,6 +5562,15 @@ _mm256_mask_cmpgt_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B) (__v8si) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_cmpgt_epu64_mask (__m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A, + (__v2di) __B, 6, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpgt_epi64_mask (__m128i __A, __m128i __B) @@ -5469,6 +5580,14 @@ _mm_cmpgt_epi64_mask (__m128i __A, __m128i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpgt_epu64_mask (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A, + (__v2di) __B, 6, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_cmpgt_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B) @@ -5477,6 +5596,15 @@ _mm_mask_cmpgt_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B) (__v2di) __B, __U); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_cmpgt_epu64_mask (__m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A, + (__v4di) __B, 6, + (__mmask8) -1); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpgt_epi64_mask (__m256i __A, __m256i __B) @@ -5486,6 +5614,14 @@ _mm256_cmpgt_epi64_mask (__m256i __A, __m256i __B) (__mmask8) -1); } +extern __inline __mmask8 +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpgt_epu64_mask (__mmask8 __U, __m256i __A, __m256i __B) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A, + (__v4di) __B, 6, __U); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_cmpgt_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B) @@ -11671,6 +11807,15 @@ _mm256_permutex_pd (__m256d __X, const int __M) (__mmask8) -1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X, + (__v8si) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpneq_epu32_mask (__m256i __X, __m256i __Y) @@ -11680,6 +11825,15 @@ _mm256_cmpneq_epu32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X, + (__v8si) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmplt_epu32_mask (__m256i __X, __m256i __Y) @@ -11689,6 +11843,15 @@ _mm256_cmplt_epu32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X, + (__v8si) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpge_epu32_mask (__m256i __X, __m256i __Y) @@ -11698,6 +11861,15 @@ _mm256_cmpge_epu32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X, + (__v8si) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmple_epu32_mask (__m256i __X, __m256i __Y) @@ -11707,6 +11879,15 @@ _mm256_cmple_epu32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X, + (__v4di) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpneq_epu64_mask (__m256i __X, __m256i __Y) @@ -11716,6 +11897,15 @@ _mm256_cmpneq_epu64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X, + (__v4di) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmplt_epu64_mask (__m256i __X, __m256i __Y) @@ -11725,6 +11915,15 @@ _mm256_cmplt_epu64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X, + (__v4di) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpge_epu64_mask (__m256i __X, __m256i __Y) @@ -11734,6 +11933,15 @@ _mm256_cmpge_epu64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X, + (__v4di) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmple_epu64_mask (__m256i __X, __m256i __Y) @@ -11743,6 +11951,15 @@ _mm256_cmple_epu64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X, + (__v8si) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpneq_epi32_mask (__m256i __X, __m256i __Y) @@ -11752,6 +11969,15 @@ _mm256_cmpneq_epi32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X, + (__v8si) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmplt_epi32_mask (__m256i __X, __m256i __Y) @@ -11761,6 +11987,15 @@ _mm256_cmplt_epi32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X, + (__v8si) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpge_epi32_mask (__m256i __X, __m256i __Y) @@ -11770,6 +12005,15 @@ _mm256_cmpge_epi32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X, + (__v8si) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmple_epi32_mask (__m256i __X, __m256i __Y) @@ -11779,6 +12023,15 @@ _mm256_cmple_epi32_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpneq_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X, + (__v4di) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpneq_epi64_mask (__m256i __X, __m256i __Y) @@ -11788,6 +12041,15 @@ _mm256_cmpneq_epi64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmplt_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X, + (__v4di) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmplt_epi64_mask (__m256i __X, __m256i __Y) @@ -11797,6 +12059,15 @@ _mm256_cmplt_epi64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmpge_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X, + (__v4di) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmpge_epi64_mask (__m256i __X, __m256i __Y) @@ -11806,6 +12077,15 @@ _mm256_cmpge_epi64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_cmple_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X, + (__v4di) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm256_cmple_epi64_mask (__m256i __X, __m256i __Y) @@ -11815,6 +12095,15 @@ _mm256_cmple_epi64_mask (__m256i __X, __m256i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X, + (__v4si) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpneq_epu32_mask (__m128i __X, __m128i __Y) @@ -11824,6 +12113,15 @@ _mm_cmpneq_epu32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X, + (__v4si) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmplt_epu32_mask (__m128i __X, __m128i __Y) @@ -11833,6 +12131,15 @@ _mm_cmplt_epu32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X, + (__v4si) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpge_epu32_mask (__m128i __X, __m128i __Y) @@ -11842,6 +12149,15 @@ _mm_cmpge_epu32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X, + (__v4si) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmple_epu32_mask (__m128i __X, __m128i __Y) @@ -11851,6 +12167,15 @@ _mm_cmple_epu32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X, + (__v2di) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpneq_epu64_mask (__m128i __X, __m128i __Y) @@ -11860,6 +12185,15 @@ _mm_cmpneq_epu64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X, + (__v2di) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmplt_epu64_mask (__m128i __X, __m128i __Y) @@ -11869,6 +12203,15 @@ _mm_cmplt_epu64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X, + (__v2di) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpge_epu64_mask (__m128i __X, __m128i __Y) @@ -11878,6 +12221,15 @@ _mm_cmpge_epu64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X, + (__v2di) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmple_epu64_mask (__m128i __X, __m128i __Y) @@ -11887,6 +12239,15 @@ _mm_cmple_epu64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X, + (__v4si) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpneq_epi32_mask (__m128i __X, __m128i __Y) @@ -11896,6 +12257,15 @@ _mm_cmpneq_epi32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X, + (__v4si) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmplt_epi32_mask (__m128i __X, __m128i __Y) @@ -11905,6 +12275,15 @@ _mm_cmplt_epi32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X, + (__v4si) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpge_epi32_mask (__m128i __X, __m128i __Y) @@ -11914,6 +12293,15 @@ _mm_cmpge_epi32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X, + (__v4si) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmple_epi32_mask (__m128i __X, __m128i __Y) @@ -11923,6 +12311,15 @@ _mm_cmple_epi32_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpneq_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X, + (__v2di) __Y, 4, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpneq_epi64_mask (__m128i __X, __m128i __Y) @@ -11932,6 +12329,15 @@ _mm_cmpneq_epi64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmplt_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X, + (__v2di) __Y, 1, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmplt_epi64_mask (__m128i __X, __m128i __Y) @@ -11941,6 +12347,15 @@ _mm_cmplt_epi64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmpge_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X, + (__v2di) __Y, 5, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmpge_epi64_mask (__m128i __X, __m128i __Y) @@ -11950,6 +12365,15 @@ _mm_cmpge_epi64_mask (__m128i __X, __m128i __Y) (__mmask8) - 1); } +extern __inline __mmask8 + __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_cmple_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y) +{ + return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X, + (__v2di) __Y, 2, + (__mmask8) __M); +} + extern __inline __mmask8 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) _mm_cmple_epi64_mask (__m128i __X, __m128i __Y) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fe3c64ca89c..1a4f1865aec 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,81 @@ +2014-10-20 Alexander Ivchenko + Maxim Kuznetsov + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * gcc.target/i386/avx512bw-vpcmpequb-1.c: New. + * gcc.target/i386/avx512bw-vpcmpequb-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpequw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpequw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgeb-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgeb-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgeub-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgeub-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgeuw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgeuw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgew-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgew-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgtub-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgtub-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgtuw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpgtuw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpleb-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpleb-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpleub-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpleub-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpleuw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpleuw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmplew-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmplew-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltb-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltb-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltub-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltub-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltuw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltuw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpltw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpneqb-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpneqb-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpnequb-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpnequb-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpnequw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpnequw-2.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpneqw-1.c: Ditto. + * gcc.target/i386/avx512bw-vpcmpneqw-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpequb-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpequd-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpequd-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpequq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpequq-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpequw-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpged-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgeq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgeud-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgeuq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgtub-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgtud-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgtud-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgtuq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgtuq-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpgtuw-2.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpled-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpleq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpleud-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpleuq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpltd-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpltq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpltud-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpltuq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpneqd-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpneqq-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpnequd-1.c: Ditto. + * gcc.target/i386/avx512vl-vpcmpnequq-1.c: Ditto. + 2014-10-29 Alexander Ivchenko Maxim Kuznetsov Anna Tikhonova diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c new file mode 100644 index 00000000000..6ec32e6b2cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpeq_epu8_mask (x128, x128); + m32 = _mm256_cmpeq_epu8_mask (x256, x256); + m64 = _mm512_cmpeq_epu8_mask (x512, x512); + m16 = _mm_mask_cmpeq_epu8_mask (3, x128, x128); + m32 = _mm256_mask_cmpeq_epu8_mask (3, x256, x256); + m64 = _mm512_mask_cmpeq_epu8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c new file mode 100644 index 00000000000..06f1c99986d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] == s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + res1 = 0; + res2 = 0; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpeq_epu8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpeq_epu8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c new file mode 100644 index 00000000000..2cd140ec3b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpeq_epu16_mask (x128, x128); + m8 = _mm_mask_cmpeq_epu16_mask (3, x128, x128); + m16 = _mm256_cmpeq_epu16_mask (x256, x256); + m16 = _mm256_mask_cmpeq_epu16_mask (3, x256, x256); + m32 = _mm512_mask_cmpeq_epu16_mask (3, x512, x512); + m32 = _mm512_cmpeq_epu16_mask (x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c new file mode 100644 index 00000000000..3fc0e7dc150 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] == s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpeq_epu16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpeq_epu16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c new file mode 100644 index 00000000000..b5345e04b2e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpge_epi8_mask (x128, x128); + m32 = _mm256_cmpge_epi8_mask (x256, x256); + m64 = _mm512_cmpge_epi8_mask (x512, x512); + m16 = _mm_mask_cmpge_epi8_mask (3, x128, x128); + m32 = _mm256_mask_cmpge_epi8_mask (3, x256, x256); + m64 = _mm512_mask_cmpge_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c new file mode 100644 index 00000000000..fe28ffb5d3a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, char *s1, char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpge_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c new file mode 100644 index 00000000000..93155d7c80c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpge_epu8_mask (x128, x128); + m32 = _mm256_cmpge_epu8_mask (x256, x256); + m64 = _mm512_cmpge_epu8_mask (x512, x512); + m16 = _mm_mask_cmpge_epu8_mask (3, x128, x128); + m32 = _mm256_mask_cmpge_epu8_mask (3, x256, x256); + m64 = _mm512_mask_cmpge_epu8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c new file mode 100644 index 00000000000..29a88c91b5e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpge_epu8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epu8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c new file mode 100644 index 00000000000..b2b1b8c4998 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpge_epu16_mask (x128, x128); + m16 = _mm256_cmpge_epu16_mask (x256, x256); + m32 = _mm512_cmpge_epu16_mask (x512, x512); + m8 = _mm_mask_cmpge_epu16_mask (3, x128, x128); + m16 = _mm256_mask_cmpge_epu16_mask (3, x256, x256); + m32 = _mm512_mask_cmpge_epu16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c new file mode 100644 index 00000000000..b0105aad297 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpge_epu16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epu16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c new file mode 100644 index 00000000000..1b9b3a3becc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpge_epi16_mask (x128, x128); + m16 = _mm256_cmpge_epi16_mask (x256, x256); + m32 = _mm512_cmpge_epi16_mask (x512, x512); + m8 = _mm_mask_cmpge_epi16_mask (3, x128, x128); + m16 = _mm256_mask_cmpge_epi16_mask (3, x256, x256); + m32 = _mm512_mask_cmpge_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c new file mode 100644 index 00000000000..6b94030b9f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, short *s1, short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] >= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpge_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpge_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c new file mode 100644 index 00000000000..c2a78c4a34e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpgt_epu8_mask (x128, x128); + m32 = _mm256_cmpgt_epu8_mask (x256, x256); + m64 = _mm512_cmpgt_epu8_mask (x512, x512); + m16 = _mm_mask_cmpgt_epu8_mask (3, x128, x128); + m32 = _mm256_mask_cmpgt_epu8_mask (3, x256, x256); + m64 = _mm512_mask_cmpgt_epu8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c new file mode 100644 index 00000000000..a0f1508ef79 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] > s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpgt_epu8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpgt_epu8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c new file mode 100644 index 00000000000..7b86082dc6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpgt_epu16_mask (x128, x128); + m16 = _mm256_cmpgt_epu16_mask (x256, x256); + m32 = _mm512_cmpgt_epu16_mask (x512, x512); + m8 = _mm_mask_cmpgt_epu16_mask (3, x128, x128); + m16 = _mm256_mask_cmpgt_epu16_mask (3, x256, x256); + m32 = _mm512_mask_cmpgt_epu16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c new file mode 100644 index 00000000000..e11be516074 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] > s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpgt_epu16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpgt_epu16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c new file mode 100644 index 00000000000..bb8fb3413f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmple_epi8_mask (x128, x128); + m32 = _mm256_cmple_epi8_mask (x256, x256); + m64 = _mm512_cmple_epi8_mask (x512, x512); + m16 = _mm_mask_cmple_epi8_mask (3, x128, x128); + m32 = _mm256_mask_cmple_epi8_mask (3, x256, x256); + m64 = _mm512_mask_cmple_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c new file mode 100644 index 00000000000..45caba4478e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, char *s1, char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] <= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmple_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c new file mode 100644 index 00000000000..15eb02adff3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmple_epu8_mask (x128, x128); + m32 = _mm256_cmple_epu8_mask (x256, x256); + m64 = _mm512_cmple_epu8_mask (x512, x512); + m16 = _mm_mask_cmple_epu8_mask (3, x128, x128); + m32 = _mm256_mask_cmple_epu8_mask (3, x256, x256); + m64 = _mm512_mask_cmple_epu8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c new file mode 100644 index 00000000000..1145dd53dd0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] <= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmple_epu8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epu8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c new file mode 100644 index 00000000000..e26cd6fcb4c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmple_epu16_mask (x128, x128); + m16 = _mm256_cmple_epu16_mask (x256, x256); + m32 = _mm512_cmple_epu16_mask (x512, x512); + m8 = _mm_mask_cmple_epu16_mask (3, x128, x128); + m16 = _mm256_mask_cmple_epu16_mask (3, x256, x256); + m32 = _mm512_mask_cmple_epu16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c new file mode 100644 index 00000000000..64028367ff6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] <= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmple_epu16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epu16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c new file mode 100644 index 00000000000..5e3b1231f4f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmple_epi16_mask (x128, x128); + m16 = _mm256_cmple_epi16_mask (x256, x256); + m32 = _mm512_cmple_epi16_mask (x512, x512); + m8 = _mm_mask_cmple_epi16_mask (3, x128, x128); + m16 = _mm256_mask_cmple_epi16_mask (3, x256, x256); + m32 = _mm512_mask_cmple_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c new file mode 100644 index 00000000000..5ee845a4053 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, short *s1, short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] <= s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmple_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmple_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c new file mode 100644 index 00000000000..9760cf625f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmplt_epi8_mask (x128, x128); + m32 = _mm256_cmplt_epi8_mask (x256, x256); + m64 = _mm512_cmplt_epi8_mask (x512, x512); + m16 = _mm_mask_cmplt_epi8_mask (3, x128, x128); + m32 = _mm256_mask_cmplt_epi8_mask (3, x256, x256); + m64 = _mm512_mask_cmplt_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c new file mode 100644 index 00000000000..a53dd2d54f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, char *s1, char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] < s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmplt_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c new file mode 100644 index 00000000000..9da0db18628 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmplt_epu8_mask (x128, x128); + m32 = _mm256_cmplt_epu8_mask (x256, x256); + m64 = _mm512_cmplt_epu8_mask (x512, x512); + m16 = _mm_mask_cmplt_epu8_mask (3, x128, x128); + m32 = _mm256_mask_cmplt_epu8_mask (3, x256, x256); + m64 = _mm512_mask_cmplt_epu8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c new file mode 100644 index 00000000000..3d83967886f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] < s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmplt_epu8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epu8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c new file mode 100644 index 00000000000..18e8d3009f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmplt_epu16_mask (x128, x128); + m16 = _mm256_cmplt_epu16_mask (x256, x256); + m32 = _mm512_cmplt_epu16_mask (x512, x512); + m8 = _mm_mask_cmplt_epu16_mask (3, x128, x128); + m16 = _mm256_mask_cmplt_epu16_mask (3, x256, x256); + m32 = _mm512_mask_cmplt_epu16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c new file mode 100644 index 00000000000..82b997c8ef3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] < s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmplt_epu16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epu16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c new file mode 100644 index 00000000000..222fbff57db --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmplt_epi16_mask (x128, x128); + m16 = _mm256_cmplt_epi16_mask (x256, x256); + m32 = _mm512_cmplt_epi16_mask (x512, x512); + m8 = _mm_mask_cmplt_epi16_mask (3, x128, x128); + m16 = _mm256_mask_cmplt_epi16_mask (3, x256, x256); + m32 = _mm512_mask_cmplt_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c new file mode 100644 index 00000000000..387d7bbc9ea --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, short *s1, short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] < s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmplt_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmplt_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c new file mode 100644 index 00000000000..0c13660707d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpb\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpneq_epi8_mask (x128, x128); + m32 = _mm256_cmpneq_epi8_mask (x256, x256); + m64 = _mm512_cmpneq_epi8_mask (x512, x512); + m16 = _mm_mask_cmpneq_epi8_mask (3, x128, x128); + m32 = _mm256_mask_cmpneq_epi8_mask (3, x256, x256); + m64 = _mm512_mask_cmpneq_epi8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c new file mode 100644 index 00000000000..db43880c2a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, char *s1, char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] != s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpneq_epi8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epi8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c new file mode 100644 index 00000000000..6a671fe0d22 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpub\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask16 m16; +volatile __mmask32 m32; +volatile __mmask64 m64; + +void extern +avx512bw_test (void) +{ + m16 = _mm_cmpneq_epu8_mask (x128, x128); + m32 = _mm256_cmpneq_epu8_mask (x256, x256); + m64 = _mm512_cmpneq_epu8_mask (x512, x512); + m16 = _mm_mask_cmpneq_epu8_mask (3, x128, x128); + m32 = _mm256_mask_cmpneq_epu8_mask (3, x256, x256); + m64 = _mm512_mask_cmpneq_epu8_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c new file mode 100644 index 00000000000..da13d7c31ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 8) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] != s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_b) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpneq_epu8_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epu8_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c new file mode 100644 index 00000000000..7ca8cfcbadb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpneq_epu16_mask (x128, x128); + m16 = _mm256_cmpneq_epu16_mask (x256, x256); + m32 = _mm512_cmpneq_epu16_mask (x512, x512); + m8 = _mm_mask_cmpneq_epu16_mask (3, x128, x128); + m16 = _mm256_mask_cmpneq_epu16_mask (3, x256, x256); + m32 = _mm512_mask_cmpneq_epu16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c new file mode 100644 index 00000000000..e8b8c6109ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] != s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpneq_epu16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epu16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c new file mode 100644 index 00000000000..46188e4af81 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512bw -mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpw\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m512i x512; +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m8; +volatile __mmask16 m16; +volatile __mmask32 m32; + +void extern +avx512bw_test (void) +{ + m8 = _mm_cmpneq_epi16_mask (x128, x128); + m16 = _mm256_cmpneq_epi16_mask (x256, x256); + m32 = _mm512_cmpneq_epi16_mask (x512, x512); + m8 = _mm_mask_cmpneq_epi16_mask (3, x128, x128); + m16 = _mm256_mask_cmpneq_epi16_mask (3, x256, x256); + m32 = _mm512_mask_cmpneq_epi16_mask (3, x512, x512); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c new file mode 100644 index 00000000000..0b5005f8eaf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */ +/* { dg-require-effective-target avx512bw } */ + +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#include "avx512f-mask-type.h" + +void +CALC (MASK_TYPE *r, short *s1, short *s2) +{ + int i; + *r = 0; + MASK_TYPE one = 1; + + for (i = 0; i < SIZE; i++) + if (s1[i] != s2[i]) + *r = *r | (one << i); +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE res_ref, res1, res2; + MASK_TYPE mask = MASK_VALUE; + + for (i = 0; i < SIZE / 2; i++) + { + src1.a[i * 2] = i; + src1.a[i * 2 + 1] = i * i; + src2.a[i * 2] = 2 * i; + src2.a[i * 2 + 1] = i * i; + } + + res1 = INTRINSIC (_cmpneq_epi16_mask) (src1.x, src2.x); + res2 = INTRINSIC (_mask_cmpneq_epi16_mask) (mask, src1.x, src2.x); + + CALC (&res_ref, src1.a, src2.a); + + if (res_ref != res1) + abort (); + + res_ref &= mask; + + if (res_ref != res2) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c new file mode 100644 index 00000000000..87c7d47908a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpequb-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpequb-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c new file mode 100644 index 00000000000..b4727080f26 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ +/* { dg-final { scan-assembler-times "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpeq_epu32_mask (x128, x128); + m = _mm256_cmpeq_epu32_mask (x256, x256); + m = _mm_mask_cmpeq_epu32_mask (3, x128, x128); + m = _mm256_mask_cmpeq_epu32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c new file mode 100644 index 00000000000..364c45e7bd3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpequd-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpequd-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c new file mode 100644 index 00000000000..4b4c6c887c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpeq_epu64_mask (x128, x128); + m = _mm256_cmpeq_epu64_mask (x256, x256); + m = _mm_mask_cmpeq_epu64_mask (3, x128, x128); + m = _mm256_mask_cmpeq_epu64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c new file mode 100644 index 00000000000..32a9b1f4203 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpequq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpequq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c new file mode 100644 index 00000000000..e903c49a680 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpequw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpequw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c new file mode 100644 index 00000000000..077c58b2d92 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpge_epi32_mask (x128, x128); + m = _mm256_cmpge_epi32_mask (x256, x256); + m = _mm_mask_cmpge_epi32_mask (3, x128, x128); + m = _mm256_mask_cmpge_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c new file mode 100644 index 00000000000..13d18fe513b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpge_epi64_mask (x128, x128); + m = _mm256_cmpge_epi64_mask (x256, x256); + m = _mm_mask_cmpge_epi64_mask (3, x128, x128); + m = _mm256_mask_cmpge_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c new file mode 100644 index 00000000000..4084cadc2f4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpge_epu32_mask (x128, x128); + m = _mm256_cmpge_epu32_mask (x256, x256); + m = _mm_mask_cmpge_epu32_mask (3, x128, x128); + m = _mm256_mask_cmpge_epu32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c new file mode 100644 index 00000000000..bd8aa311e23 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpge_epu64_mask (x128, x128); + m = _mm256_cmpge_epu64_mask (x256, x256); + m = _mm_mask_cmpge_epu64_mask (3, x128, x128); + m = _mm256_mask_cmpge_epu64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c new file mode 100644 index 00000000000..f4fa61afecb --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtub-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtub-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c new file mode 100644 index 00000000000..273781a0fa6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpgt_epu32_mask (x128, x128); + m = _mm256_cmpgt_epu32_mask (x256, x256); + m = _mm_mask_cmpgt_epu32_mask (3, x128, x128); + m = _mm256_mask_cmpgt_epu32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c new file mode 100644 index 00000000000..7a9117fdb31 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtud-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtud-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c new file mode 100644 index 00000000000..2d6e64ce5d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpgt_epu64_mask (x128, x128); + m = _mm256_cmpgt_epu64_mask (x256, x256); + m = _mm_mask_cmpgt_epu64_mask (3, x128, x128); + m = _mm256_mask_cmpgt_epu64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c new file mode 100644 index 00000000000..c0bf472ee61 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtuq-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpcmpgtuq-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c new file mode 100644 index 00000000000..b516b66bb53 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */ +/* { dg-require-effective-target avx512vl } */ + +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtuw-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512bw-vpcmpgtuw-2.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c new file mode 100644 index 00000000000..928e836e26b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmple_epi32_mask (x128, x128); + m = _mm256_cmple_epi32_mask (x256, x256); + m = _mm_mask_cmple_epi32_mask (3, x128, x128); + m = _mm256_mask_cmple_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c new file mode 100644 index 00000000000..0a8270b87ca --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmple_epi64_mask (x128, x128); + m = _mm256_cmple_epi64_mask (x256, x256); + m = _mm_mask_cmple_epi64_mask (3, x128, x128); + m = _mm256_mask_cmple_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c new file mode 100644 index 00000000000..fb93bac92b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmple_epu32_mask (x128, x128); + m = _mm256_cmple_epu32_mask (x256, x256); + m = _mm_mask_cmple_epu32_mask (3, x128, x128); + m = _mm256_mask_cmple_epu32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c new file mode 100644 index 00000000000..2f73af82b8d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmple_epu64_mask (x128, x128); + m = _mm256_cmple_epu64_mask (x256, x256); + m = _mm_mask_cmple_epu64_mask (3, x128, x128); + m = _mm256_mask_cmple_epu64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c new file mode 100644 index 00000000000..9b1c8aa31f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmplt_epi32_mask (x128, x128); + m = _mm256_cmplt_epi32_mask (x256, x256); + m = _mm_mask_cmplt_epi32_mask (3, x128, x128); + m = _mm256_mask_cmplt_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c new file mode 100644 index 00000000000..187cf9ee4e4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmplt_epi64_mask (x128, x128); + m = _mm256_cmplt_epi64_mask (x256, x256); + m = _mm_mask_cmplt_epi64_mask (3, x128, x128); + m = _mm256_mask_cmplt_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c new file mode 100644 index 00000000000..74680334db3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmplt_epu32_mask (x128, x128); + m = _mm256_cmplt_epu32_mask (x256, x256); + m = _mm_mask_cmplt_epu32_mask (3, x128, x128); + m = _mm256_mask_cmplt_epu32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c new file mode 100644 index 00000000000..d3af5e4d3a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmplt_epu64_mask (x128, x128); + m = _mm256_cmplt_epu64_mask (x256, x256); + m = _mm_mask_cmplt_epu64_mask (3, x128, x128); + m = _mm256_mask_cmplt_epu64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c new file mode 100644 index 00000000000..6b57ac0a0ad --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpd\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpneq_epi32_mask (x128, x128); + m = _mm256_cmpneq_epi32_mask (x256, x256); + m = _mm_mask_cmpneq_epi32_mask (3, x128, x128); + m = _mm256_mask_cmpneq_epi32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c new file mode 100644 index 00000000000..eeacd087ece --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpneq_epi64_mask (x128, x128); + m = _mm256_cmpneq_epi64_mask (x256, x256); + m = _mm_mask_cmpneq_epi64_mask (3, x128, x128); + m = _mm256_mask_cmpneq_epi64_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c new file mode 100644 index 00000000000..f83402939c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpud\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpneq_epu32_mask (x128, x128); + m = _mm256_cmpneq_epu32_mask (x256, x256); + m = _mm_mask_cmpneq_epu32_mask (3, x128, x128); + m = _mm256_mask_cmpneq_epu32_mask (3, x256, x256); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c new file mode 100644 index 00000000000..a2472ab0d81 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ +/* { dg-final { scan-assembler "vpcmpuq\[ \\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */ + +#include + +volatile __m256i x256; +volatile __m128i x128; +volatile __mmask8 m; + +void extern +avx512vl_test (void) +{ + m = _mm_cmpneq_epu64_mask (x128, x128); + m = _mm256_cmpneq_epu64_mask (x256, x256); + m = _mm_mask_cmpneq_epu64_mask (3, x128, x128); + m = _mm256_mask_cmpneq_epu64_mask (3, x256, x256); +}