From: Luke Kenneth Casson Leighton Date: Sat, 25 May 2019 07:55:47 +0000 (+0100) Subject: add branch speculation using shadows X-Git-Tag: div_pipeline~1948 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eee9af0edb51f78db957ae0ab5ab412f3d122123;p=soc.git add branch speculation using shadows --- diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py index 879769a7..626e8558 100644 --- a/src/experiment/score6600.py +++ b/src/experiment/score6600.py @@ -381,25 +381,33 @@ class Scoreboard(Elaboratable): # tacked onto the ShadowMatrix (hence shadow_wid=n_int_fus+1) # only needs to set shadow_i, s_fail_i and s_good_i - comb += shadows.s_good_i[n_int_fus].eq(bspec.good_o[i]) - comb += shadows.s_fail_i[n_int_fus].eq(bspec.fail_o[i]) - with m.If(self.branch_succ_i | self.branch_fail_i): - for i in range(n_int_fus): - comb += shadows.shadow_i[i][n_int_fus].eq(1) + comb += shadows.shadow_i[fn_issue_o][n_int_fus].eq(1) # finally, we need an indicator to the test infrastructure as to # whether the branch succeeded or failed, plus, link up to the # "recorder" of whether the instruction was under shadow or not - comb += bspec.issue_i.eq(fn_issue_o) + with m.If(cu.br1.issue_i): + sync += bspec.issue_i.eq(1) comb += bspec.good_i.eq(self.branch_succ_i) comb += bspec.fail_i.eq(self.branch_fail_i) # branch is active (TODO: a better signal: this is over-using the # go_write signal - actually the branch should not be "writing") with m.If(cu.br1.go_wr_i): sync += self.branch_direction_o.eq(cu.br1.data_o+Const(1, 2)) - comb += bspec.branch_i.eq(1) + sync += bspec.issue_i.eq(0) + comb += bspec.br_i.eq(1) + # branch occurs if data == 1, failed if data == 0 + br_good = Signal(reset_less=True) + comb += br_good.eq(cu.br1.data_o == 1) + comb += bspec.br_good_i.eq(br_good) + comb += bspec.br_fail_i.eq(~br_good) + # the *expected* direction of the branch matched against *actual* + comb += shadows.s_good_i[n_int_fus].eq(bspec.matched_o) + # ... or it didn't + comb += shadows.s_fail_i[n_int_fus].eq(~bspec.matched_o) + #--------- # Connect Register File(s) @@ -631,7 +639,7 @@ def scoreboard_sim(dut, alusim): yield dut.int_store_i.eq(1) - for i in range(20): + for i in range(1): # set random values in the registers for i in range(1, dut.n_regs): @@ -642,7 +650,7 @@ def scoreboard_sim(dut, alusim): # create some instructions (some random, some regression tests) instrs = [] - if True: + if False: instrs = create_random_ops(dut, 10, False, 4) if False: @@ -698,12 +706,21 @@ def scoreboard_sim(dut, alusim): instrs.append( (2, 6, 3, 0) ) instrs.append( (4, 2, 2, 1) ) + if True: + v1 = 6 + yield dut.intregs.regs[5].reg.eq(v1) + alusim.setval(5, v1) + yield dut.intregs.regs[3].reg.eq(5) + alusim.setval(3, 5) + instrs.append((5, 3, 3, 4, (0, 0))) + instrs.append((4, 2, 1, 2, (1, 0))) + # issue instruction(s), wait for issue to be free before proceeding - for i, (src1, src2, dest, op) in enumerate(instrs): + for i, (src1, src2, dest, op, (br_ok, br_fail)) in enumerate(instrs): print ("instr %d: (%d, %d, %d, %d)" % (i, src1, src2, dest, op)) alusim.op(op, src1, src2, dest) - yield from int_instr(dut, op, src1, src2, dest, 0, 0) + yield from int_instr(dut, op, src1, src2, dest, br_ok, br_fail) yield yield from wait_for_issue(dut) diff --git a/src/scoreboard/shadow.py b/src/scoreboard/shadow.py index 1b8903dc..d04c8e55 100644 --- a/src/scoreboard/shadow.py +++ b/src/scoreboard/shadow.py @@ -181,34 +181,40 @@ class BranchSpeculationRecord(Elaboratable): def __init__(self, n_fus): self.n_fus = n_fus - # inputs - self.issue_i = Signal(n_fus, reset_less=True) - self.good_i = Signal(n_fus, reset_less=True) - self.fail_i = Signal(n_fus, reset_less=True) - self.branch_i = Signal(reset_less=True) + # inputs: record *expected* status + self.issue_i = Signal(reset_less=True) + self.good_i = Signal(reset_less=True) + self.fail_i = Signal(reset_less=True) - # outputs - self.good_o = Signal(n_fus, reset_less=True) - self.fail_o = Signal(n_fus, reset_less=True) + # inputs: status of branch (when result was known) + self.br_i = Signal(reset_less=True) + self.br_good_i = Signal(reset_less=True) + self.br_fail_i = Signal(reset_less=True) + + # outputs: true if the *expected* outcome matched the *actual* outcome + self.matched_o = Signal(reset_less=True) def elaborate(self, platform): m = Module() - good_r = Signal(self.n_fus) - fail_r = Signal(self.n_fus) - - # sigh, there's a way to do this without if statements, as pure - # ANDing and ORing... - for i in range(self.n_fus): - with m.If(self.branch_i): - with m.If(good_r[i] | fail_r[i]): - m.d.comb += self.good_o[i].eq(good_r[i] | ~fail_r[i]) - m.d.comb += self.fail_o[i].eq(fail_r[i] | ~good_r[i]) - m.d.sync += good_r[i].eq(0) # might be set if issue set as well - m.d.sync += fail_r[i].eq(0) # might be set if issue set as well - with m.If(self.issue_i[i]): - m.d.sync += good_r[i].eq(self.good_i[i]) - m.d.sync += fail_r[i].eq(self.fail_i[i]) + # registers to record *expected* status + good_r = Signal() + fail_r = Signal() + + with m.If(self.br_i): + # we expected fail, return OK that fail was EXPECTED... OR... + # we expected good, return OK that good was EXPECTED + success = Signal(reset_less=True) + m.d.comb += success.eq((good_r & self.br_good_i) | \ + (fail_r & self.br_fail_i) ) + # ... but only set these where a good or fail *is* expected... + with m.If(good_r | fail_r): + m.d.comb += self.matched_o.eq(success) + m.d.sync += good_r.eq(0) # might be set if issue set as well + m.d.sync += fail_r.eq(0) # might be set if issue set as well + with m.If(self.issue_i): + m.d.sync += good_r.eq(good_r | self.good_i) + m.d.sync += fail_r.eq(fail_r | self.fail_i) return m @@ -216,7 +222,9 @@ class BranchSpeculationRecord(Elaboratable): yield self.issue_i yield self.good_i yield self.fail_i - yield self.branch_i + yield self.br_i + yield self.br_good_i + yield self.br_fail_i yield self.good_o yield self.fail_o