From: Richard Biener Date: Mon, 18 Nov 2019 09:44:52 +0000 (+0000) Subject: re PR target/92462 ([arm32] -ftree-pre makes a variable to be wrongly hoisted out) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ef50b972e10238a1ac20f23ce3bb32187ae4cb84;p=gcc.git re PR target/92462 ([arm32] -ftree-pre makes a variable to be wrongly hoisted out) 2019-11-18 Richard Biener PR rtl-optimization/92462 * alias.c (find_base_term): Restrict the look through ANDs. (find_base_value): Likewise. From-SVN: r278391 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6e3fab83686..f5d4d770fe1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-11-18 Richard Biener + + PR rtl-optimization/92462 + * alias.c (find_base_term): Restrict the look through ANDs. + (find_base_value): Likewise. + 2019-11-18 Georg-Johann Lay Add support for AVR devices from the 0-series. diff --git a/gcc/alias.c b/gcc/alias.c index 34e19fe8ca1..800b71902d5 100644 --- a/gcc/alias.c +++ b/gcc/alias.c @@ -1464,9 +1464,11 @@ find_base_value (rtx src) return find_base_value (XEXP (src, 1)); case AND: - /* If the second operand is constant set the base - address to the first operand. */ - if (CONST_INT_P (XEXP (src, 1)) && INTVAL (XEXP (src, 1)) != 0) + /* Look through aligning ANDs. And AND with zero or one with + the LSB set isn't one (see for example PR92462). */ + if (CONST_INT_P (XEXP (src, 1)) + && INTVAL (XEXP (src, 1)) != 0 + && (INTVAL (XEXP (src, 1)) & 1) == 0) return find_base_value (XEXP (src, 0)); return 0; @@ -2024,7 +2026,11 @@ find_base_term (rtx x, vec