From: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Date: Sun, 21 Apr 2019 10:35:17 +0000 (+0200)
Subject: nir/opcodes: make sure f2f16_rtz and f2f16_rtne behavior is not overriden by the... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ef681cf9713664bcd3e95d54cc158b93b3542dc8;p=mesa.git

nir/opcodes: make sure f2f16_rtz and f2f16_rtne behavior is not overriden by the float controls execution mode

Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
---

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 5a1c8fd2514..d4d1f295eee 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -221,9 +221,28 @@ for src_t in [tint, tuint, tfloat, tbool]:
           if bit_size == 16 and dst_t == tfloat and src_t == tfloat:
               rnd_modes = ['_rtne', '_rtz', '']
               for rnd_mode in rnd_modes:
+                  if rnd_mode == '_rtne':
+                      conv_expr = """
+                      if (bit_size > 16) {
+                         dst = _mesa_half_to_float(_mesa_float_to_float16_rtne(src0));
+                      } else {
+                         dst = src0;
+                      }
+                      """
+                  elif rnd_mode == '_rtz':
+                      conv_expr = """
+                      if (bit_size > 16) {
+                         dst = _mesa_half_to_float(_mesa_float_to_float16_rtz(src0));
+                      } else {
+                         dst = src0;
+                      }
+                      """
+                  else:
+                      conv_expr = "src0"
+
                   unop_numeric_convert("{0}2{1}{2}{3}".format(src_t[0], dst_t[0],
                                                               bit_size, rnd_mode),
-                                       dst_t + str(bit_size), src_t, "src0")
+                                       dst_t + str(bit_size), src_t, conv_expr)
           elif bit_size == 32 and dst_t == tfloat and src_t == tfloat:
               conv_expr = """
               if (bit_size > 32 && nir_is_rounding_mode_rtz(execution_mode, 32)) {