From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 21 Apr 2019 05:47:00 +0000 (+0100)
Subject: add exception causes from ariane
X-Git-Tag: div_pipeline~2213
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=efa73430f4197f549e1aaa3eb6975337f3a1353b;p=soc.git

add exception causes from ariane
---

diff --git a/TLB/src/ariane/exceptcause.py b/TLB/src/ariane/exceptcause.py
new file mode 100644
index 00000000..4c5cb2d5
--- /dev/null
+++ b/TLB/src/ariane/exceptcause.py
@@ -0,0 +1,16 @@
+from nmigen import Const
+
+INSTR_ADDR_MISALIGNED = Const(0, 64)
+INSTR_ACCESS_FAULT    = Const(1, 64)
+ILLEGAL_INSTR         = Const(2, 64)
+BREAKPOINT            = Const(3, 64)
+LD_ADDR_MISALIGNED    = Const(4, 64)
+LD_ACCESS_FAULT       = Const(5, 64)
+ST_ADDR_MISALIGNED    = Const(6, 64)
+ST_ACCESS_FAULT       = Const(7, 64)
+ENV_CALL_UMODE        = Const(8, 64)  # environment call from user mode
+ENV_CALL_SMODE        = Const(9, 64)  # environment call from supervisor mode
+ENV_CALL_MMODE        = Const(11, 64) # environment call from machine mode
+INSTR_PAGE_FAULT      = Const(12, 64) # Instruction page fault
+LOAD_PAGE_FAULT       = Const(13, 64) # Load page fault
+STORE_PAGE_FAULT      = Const(15, 64) # Store page fault