From: H.J. Lu <hongjiu.lu@intel.com>
Date: Mon, 1 Aug 2011 18:21:07 +0000 (+0000)
Subject: Use ptr_mode for stack protector.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=efd7630c8ff4bedf1f0e2afc072657c1da302834;p=gcc.git

Use ptr_mode for stack protector.

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/47766
	* config/i386/i386.md (PTR): New.
	(stack_protect_set: Check TARGET_LP64 instead of TARGET_64BIT.
	(stack_protect_test): Likewise.
	(stack_protect_set_<mode>): Replace ":P" with ":PTR".
	(stack_tls_protect_set_<mode>): Likewise.
	(stack_tls_protect_test_<mode>): Likewise.

From-SVN: r177067
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c3d1b3a14d6..f03046ed8a0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/47766
+	* config/i386/i386.md (PTR): New.
+	(stack_protect_set: Check TARGET_LP64 instead of TARGET_64BIT.
+	(stack_protect_test): Likewise.
+	(stack_protect_set_<mode>): Replace ":P" with ":PTR".
+	(stack_tls_protect_set_<mode>): Likewise.
+	(stack_tls_protect_test_<mode>): Likewise.
+
 2011-08-01  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/49927
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 0c78f92ef3a..3a07d4e3c00 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -951,6 +951,11 @@
 ;; This mode iterator allows :P to be used for patterns that operate on
 ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
 (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+
+;; This mode iterator allows :PTR to be used for patterns that operate on
+;; ptr_mode sized quantities.
+(define_mode_iterator PTR
+  [(SI "ptr_mode == SImode") (DI "ptr_mode == DImode")])
 
 ;; Scheduling descriptions
 
@@ -17402,11 +17407,11 @@
 
 #ifdef TARGET_THREAD_SSP_OFFSET
   operands[1] = GEN_INT (TARGET_THREAD_SSP_OFFSET);
-  insn = (TARGET_64BIT
+  insn = (TARGET_LP64
 	  ? gen_stack_tls_protect_set_di
 	  : gen_stack_tls_protect_set_si);
 #else
-  insn = (TARGET_64BIT
+  insn = (TARGET_LP64
 	  ? gen_stack_protect_set_di
 	  : gen_stack_protect_set_si);
 #endif
@@ -17416,19 +17421,20 @@
 })
 
 (define_insn "stack_protect_set_<mode>"
-  [(set (match_operand:P 0 "memory_operand" "=m")
-	(unspec:P [(match_operand:P 1 "memory_operand" "m")] UNSPEC_SP_SET))
-   (set (match_scratch:P 2 "=&r") (const_int 0))
+  [(set (match_operand:PTR 0 "memory_operand" "=m")
+	(unspec:PTR [(match_operand:PTR 1 "memory_operand" "m")]
+		    UNSPEC_SP_SET))
+   (set (match_scratch:PTR 2 "=&r") (const_int 0))
    (clobber (reg:CC FLAGS_REG))]
   ""
   "mov{<imodesuffix>}\t{%1, %2|%2, %1}\;mov{<imodesuffix>}\t{%2, %0|%0, %2}\;xor{l}\t%k2, %k2"
   [(set_attr "type" "multi")])
 
 (define_insn "stack_tls_protect_set_<mode>"
-  [(set (match_operand:P 0 "memory_operand" "=m")
-	(unspec:P [(match_operand:P 1 "const_int_operand" "i")]
-		  UNSPEC_SP_TLS_SET))
-   (set (match_scratch:P 2 "=&r") (const_int 0))
+  [(set (match_operand:PTR 0 "memory_operand" "=m")
+	(unspec:PTR [(match_operand:PTR 1 "const_int_operand" "i")]
+		    UNSPEC_SP_TLS_SET))
+   (set (match_scratch:PTR 2 "=&r") (const_int 0))
    (clobber (reg:CC FLAGS_REG))]
   ""
   "mov{<imodesuffix>}\t{%@:%P1, %2|%2, <iptrsize> PTR %@:%P1}\;mov{<imodesuffix>}\t{%2, %0|%0, %2}\;xor{l}\t%k2, %k2"
@@ -17446,11 +17452,11 @@
 
 #ifdef TARGET_THREAD_SSP_OFFSET
   operands[1] = GEN_INT (TARGET_THREAD_SSP_OFFSET);
-  insn = (TARGET_64BIT
+  insn = (TARGET_LP64
 	  ? gen_stack_tls_protect_test_di
 	  : gen_stack_tls_protect_test_si);
 #else
-  insn = (TARGET_64BIT
+  insn = (TARGET_LP64
 	  ? gen_stack_protect_test_di
 	  : gen_stack_protect_test_si);
 #endif
@@ -17464,20 +17470,20 @@
 
 (define_insn "stack_protect_test_<mode>"
   [(set (match_operand:CCZ 0 "flags_reg_operand" "")
-	(unspec:CCZ [(match_operand:P 1 "memory_operand" "m")
-		     (match_operand:P 2 "memory_operand" "m")]
+	(unspec:CCZ [(match_operand:PTR 1 "memory_operand" "m")
+		     (match_operand:PTR 2 "memory_operand" "m")]
 		    UNSPEC_SP_TEST))
-   (clobber (match_scratch:P 3 "=&r"))]
+   (clobber (match_scratch:PTR 3 "=&r"))]
   ""
   "mov{<imodesuffix>}\t{%1, %3|%3, %1}\;xor{<imodesuffix>}\t{%2, %3|%3, %2}"
   [(set_attr "type" "multi")])
 
 (define_insn "stack_tls_protect_test_<mode>"
   [(set (match_operand:CCZ 0 "flags_reg_operand" "")
-	(unspec:CCZ [(match_operand:P 1 "memory_operand" "m")
-		     (match_operand:P 2 "const_int_operand" "i")]
+	(unspec:CCZ [(match_operand:PTR 1 "memory_operand" "m")
+		     (match_operand:PTR 2 "const_int_operand" "i")]
 		    UNSPEC_SP_TLS_TEST))
-   (clobber (match_scratch:P 3 "=r"))]
+   (clobber (match_scratch:PTR 3 "=r"))]
   ""
   "mov{<imodesuffix>}\t{%1, %3|%3, %1}\;xor{<imodesuffix>}\t{%@:%P2, %3|%3, <iptrsize> PTR %@:%P2}"
   [(set_attr "type" "multi")])