From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 20 Jun 2019 17:21:57 +0000 (-0700)
Subject: write_xaiger to skip POs driven by 1'bx
X-Git-Tag: working-ls180~1208^2~138
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=efdb057c6ad5ba0fe05a597ba5f080067f061aad;p=yosys.git

write_xaiger to skip POs driven by 1'bx
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 1485e2b0c..12b23cfe9 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -152,9 +152,13 @@ struct XAigerWriter
 				}
 
 				if (wire->port_output || keep) {
-					if (bit != wirebit)
-						alias_map[wirebit] = bit;
-					output_bits.insert(wirebit);
+					if (bit != RTLIL::Sx) {
+						if (bit != wirebit)
+							alias_map[wirebit] = bit;
+						output_bits.insert(wirebit);
+					}
+					else
+						log_debug("Skipping PO '%s' driven by 1'bx\n", log_signal(wirebit));
 				}
 			}
 		}