From: bugzilla-daemon <bugzilla-daemon@libre-soc.org>
Date: Sun, 7 Jun 2020 22:31:59 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 368] New: Need one example unit test of how to run some assemb... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=efface1dfbec83c699f0b1af4fc9b90bbffcdf56;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 368] New: Need one example unit test of how to run some assembly code "qemu vs simulator" rather than "qemu vs hardware"
---

diff --git a/12/1ee66e5fd8553660556030a665111a7ff14baa b/12/1ee66e5fd8553660556030a665111a7ff14baa
new file mode 100644
index 0000000..0c1b308
--- /dev/null
+++ b/12/1ee66e5fd8553660556030a665111a7ff14baa
@@ -0,0 +1,85 @@
+Return-path: <libre-riscv-dev-bounces@lists.libre-riscv.org>
+Envelope-to: publicinbox@libre-riscv.org
+Delivery-date: Sun, 07 Jun 2020 23:32:02 +0100
+Received: from localhost ([::1] helo=libre-riscv.org)
+	by libre-soc.org with esmtp (Exim 4.89)
+	(envelope-from <libre-riscv-dev-bounces@lists.libre-riscv.org>)
+	id 1ji3pg-0004qA-33; Sun, 07 Jun 2020 23:32:00 +0100
+Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org)
+ by libre-soc.org with esmtp (Exim 4.89)
+ (envelope-from <bugzilla-daemon@libre-soc.org>) id 1ji3pe-0004q4-Sh
+ for libre-riscv-dev@lists.libre-riscv.org; Sun, 07 Jun 2020 23:31:58 +0100
+From: bugzilla-daemon@libre-soc.org
+To: libre-riscv-dev@lists.libre-riscv.org
+Date: Sun, 07 Jun 2020 22:31:59 +0000
+X-Bugzilla-Reason: CC
+X-Bugzilla-Type: new
+X-Bugzilla-Watch-Reason: None
+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Formal Verification
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: colepoirier@gmail.com
+X-Bugzilla-Status: CONFIRMED
+X-Bugzilla-Resolution: 
+X-Bugzilla-Priority: ---
+X-Bugzilla-Assigned-To: lkcl@lkcl.net
+X-Bugzilla-Flags: 
+X-Bugzilla-Changed-Fields: bug_id short_desc product version rep_platform
+ op_sys bug_status bug_severity priority component assigned_to reporter cc
+ cf_nlnet_milestone
+Message-ID: <bug-368-13@https.bugs.libre-soc.org/>
+X-Bugzilla-URL: https://bugs.libre-soc.org/
+Auto-Submitted: auto-generated
+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 368] New: Need one example unit test of how
+ to run some assembly code "qemu vs simulator" rather than "qemu vs
+ hardware"
+X-BeenThere: libre-riscv-dev@lists.libre-riscv.org
+X-Mailman-Version: 2.1.23
+Precedence: list
+List-Id: Libre-RISCV General Development
+ <libre-riscv-dev.lists.libre-riscv.org>
+List-Unsubscribe: <http://lists.libre-riscv.org/mailman/options/libre-riscv-dev>, 
+ <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=unsubscribe>
+List-Archive: <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
+List-Post: <mailto:libre-riscv-dev@lists.libre-riscv.org>
+List-Help: <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=help>
+List-Subscribe: <http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev>, 
+ <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=subscribe>
+Reply-To: Libre-RISCV General Development
+ <libre-riscv-dev@lists.libre-riscv.org>
+Content-Type: text/plain; charset="utf-8"
+Content-Transfer-Encoding: base64
+Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org
+Sender: "libre-riscv-dev" <libre-riscv-dev-bounces@lists.libre-riscv.org>
+
+aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTM2OAoKICAgICAgICAg
+ICAgQnVnIElEOiAzNjgKICAgICAgICAgICBTdW1tYXJ5OiBOZWVkIG9uZSBleGFtcGxlIHVuaXQg
+dGVzdCBvZiBob3cgdG8gcnVuIHNvbWUgYXNzZW1ibHkKICAgICAgICAgICAgICAgICAgICBjb2Rl
+ICJxZW11IHZzIHNpbXVsYXRvciIgcmF0aGVyIHRoYW4gInFlbXUgdnMKICAgICAgICAgICAgICAg
+ICAgICBoYXJkd2FyZSIKICAgICAgICAgICBQcm9kdWN0OiBMaWJyZS1TT0MncyBmaXJzdCBTb0MK
+ICAgICAgICAgICBWZXJzaW9uOiB1bnNwZWNpZmllZAogICAgICAgICAgSGFyZHdhcmU6IFBDCiAg
+ICAgICAgICAgICAgICBPUzogTGludXgKICAgICAgICAgICAgU3RhdHVzOiBDT05GSVJNRUQKICAg
+ICAgICAgIFNldmVyaXR5OiBlbmhhbmNlbWVudAogICAgICAgICAgUHJpb3JpdHk6IC0tLQogICAg
+ICAgICBDb21wb25lbnQ6IEZvcm1hbCBWZXJpZmljYXRpb24KICAgICAgICAgIEFzc2lnbmVlOiBs
+a2NsQGxrY2wubmV0CiAgICAgICAgICBSZXBvcnRlcjogY29sZXBvaXJpZXJAZ21haWwuY29tCiAg
+ICAgICAgICAgICAgICBDQzogbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxpYnJlLXJpc2N2Lm9yZwog
+ICBOTG5ldCBtaWxlc3RvbmU6IC0tLQoKV2UgbmVlZCBvbmUgZXhhbXBsZSB1bml0IHRlc3Qgb2Yg
+aG93IHRvIHJ1biBzb21lIGFzc2VtYmx5IGNvZGUKInFlbXUgdnMgc2ltdWxhdG9yIiByYXRoZXIg
+dGhhbiAicWVtdSB2cyBoYXJkd2FyZSIKCm9yLCBldmVuIGp1c3QgInFlbXUgd2l0aCBzb21lIGFz
+c2VydHMiIGJ1dCBsb29raW5nICpleGFjdGx5KiBsaWtlIGhvdwppdCdzIGRvbmUgaW4gdGhlIHNp
+bXVsYXRvciwgcmlnaHQgbm93LgoKYW5kIHRoYXQgdWx0aW1hdGVseSBpdCBzaG91bGQgYmUgcG9z
+c2libGUgdG8gaGF2ZSBhIHJ1bnRpbWUgc3dpdGNoCihvciBhIHN1aXRlIG9mIHRlc3RzKSB0aGF0
+IGFsbG93IHVzIHRvIHZlcmlmeSAqYWFhbGxsKiB0aGUgc2ltdWxhdG9yCnRlc3RfcGlwZV9jYWxs
+ZXIucHkgdGVzdHMsIGluIHRoZSBmb2xsb3dpbmcgd2F5OgoKKiBzaW11bGF0b3IgdnMgcWVtdQoq
+IHFlbXUgdnMgaGFyZHdhcmUKKiBoYXJkd2FyZSB2cyBzaW11bGF0b3IKCmxhdGVyIGkgd291bGQg
+dmVyeSBtdWNoIGxpa2UgdG8gYmUgYWJsZSB0byBhZGQgbWljcm93YXR0IHRvIHRoYXQgbGlzdC4K
+CjxodHRwczovL2J1Z3MubGlicmUtc29jLm9yZy9zaG93X2J1Zy5jZ2k/aWQ9MzI1I2M4Mj4KCi0t
+IApZb3UgYXJlIHJlY2VpdmluZyB0aGlzIG1haWwgYmVjYXVzZToKWW91IGFyZSBvbiB0aGUgQ0Mg
+bGlzdCBmb3IgdGhlIGJ1Zy4KX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
+X19fX19fX18KbGlicmUtcmlzY3YtZGV2IG1haWxpbmcgbGlzdApsaWJyZS1yaXNjdi1kZXZAbGlz
+dHMubGlicmUtcmlzY3Yub3JnCmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9s
+aXN0aW5mby9saWJyZS1yaXNjdi1kZXYK
+