From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 21 Dec 2021 15:57:37 +0000 (+0000)
Subject: whoops issuer_verilog.py enabling mmu has to pass microwatt_mmu
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f10c64c74530eb6400136e73648f5d31e6da092a;p=soc.git

whoops issuer_verilog.py enabling mmu has to pass microwatt_mmu
option to TestMemPSpec
---

diff --git a/src/soc/simple/issuer_verilog.py b/src/soc/simple/issuer_verilog.py
index 8c0f8e1f..b3b7410d 100644
--- a/src/soc/simple/issuer_verilog.py
+++ b/src/soc/simple/issuer_verilog.py
@@ -99,10 +99,10 @@ if __name__ == '__main__':
                          sram4x4kblock=args.enable_sram4x4kblock, # add SRAMs
                          debug=args.debug,      # set to jtag or dmi
                          svp64=args.svp64,      # enable SVP64
-                         mmu=args.mmu,          # enable MMU
+                         microwatt_mmu=args.mmu,          # enable MMU
                          units=units)
 
-    print("mmu", pspec.__dict__["mmu"])
+    print("mmu", pspec.__dict__["microwatt_mmu"])
     print("nocore", pspec.__dict__["nocore"])
     print("regreduce", pspec.__dict__["regreduce"])
     print("gpio", pspec.__dict__["gpio"])