From: Benjamin Herrenschmidt Date: Fri, 8 May 2020 01:40:39 +0000 (+1000) Subject: xics: Add missing fusesoc core file X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f124dc4a4099eb666f8f99d82ad5331d66ac1ebf;p=microwatt.git xics: Add missing fusesoc core file Signed-off-by: Benjamin Herrenschmidt --- diff --git a/microwatt.core b/microwatt.core index a2d6ab5..0d8531e 100644 --- a/microwatt.core +++ b/microwatt.core @@ -45,6 +45,7 @@ filesets: - wishbone_debug_master.vhdl - wishbone_bram_wrapper.vhdl - soc.vhdl + - xics.vhdl file_type : vhdlSource-2008 fpga: