From: lkcl <lkcl@web>
Date: Fri, 10 Sep 2021 12:56:35 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~167
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f12863bcba801f7ac688d5b2ac0d621b663281c6;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index f3983a220..25cf68e57 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -138,8 +138,8 @@ v3.0B base operand from e.g. `mfcr`) or CR bit (referred to by a 5-bit operand f
 *is* itself the explicit and sole result of the operation.
 
 Therefore, logically, Predicate-result needs to be adapted to
-test the actual result of the CR-based instruction, rather than
-test the co-resultant CR when Rc=1.
+test the actual result of the CR-based instruction (rather than
+test the co-resultant CR when Rc=1, as is done for Arithmetic SVP64).
 
     for i in range(VL):
         # predication test, skip all masked out elements.