From: lkcl <lkcl@web>
Date: Sun, 3 Oct 2021 00:15:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3745
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f15de9ed1ac3cdd36e04169ea5da64fe9a3b2c7b;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn
index 661a98053..b2d4dc98a 100644
--- a/3d_gpu/architecture/dynamic_simd.mdwn
+++ b/3d_gpu/architecture/dynamic_simd.mdwn
@@ -35,9 +35,12 @@ overrides.
 The second set of changes is targetted at Type 2 dsl.Module,
 to complete the 98% abstraction from Type 1 to a 100% level
 
-* To add a new parameter to Module which is the AST class type
+* To add a new parameter to Module's constructor,
+  `_astType`, which is the AST class type
   to be used for "casting" of m.If and m.Elif condition tests,
   and for m.Switch values
+* To replace the two (2) calls to `Value.cast()` in Module
+  with `self._astType.cast()`
 
 No further modifications beyond that are strictly necessary.