From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 1 Feb 2009 08:25:15 +0000 (-0800)
Subject: X86: Hook up the IDE controller interrupt line.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f1b43b39a764645c8e15b66a1a01d404f03c8307;p=gem5.git

X86: Hook up the IDE controller interrupt line.
---

diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index be9276145..8d766471e 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -87,6 +87,7 @@ class SouthBridge(SimObject):
     ide.BAR3LegacyIO = True
     ide.BAR4 = 1
     ide.Command = 1
+    ide.InterruptLine = 20
 
     def attachIO(self, bus):
         # Route interupt signals
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 3dfa50d7f..5005bd296 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -127,13 +127,13 @@ Pc::clearConsoleInt()
 void
 Pc::postPciInt(int line)
 {
-    panic("Need implementation\n");
+    southBridge->ioApic->signalInterrupt(line);
 }
 
 void
 Pc::clearPciInt(int line)
 {
-    panic("Need implementation\n");
+    warn_once("Tried to clear PCI interrupt %d\n", line);
 }
 
 Addr