From: Andrew Waterman <andrew@sifive.com>
Date: Tue, 2 Jan 2018 20:34:01 +0000 (+0000)
Subject: RISC-V: Fix for icache flush issue on multicore processors.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f1bdc63a898f2fa164e79528c03e96a21a779e82;p=gcc.git

RISC-V: Fix for icache flush issue on multicore processors.

	gcc/
	* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
	* config/riscv/riscv.md (clear_cache): Use it.

From-SVN: r256109
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 403c46ff344..4e5323c68fe 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-02  Andrew Waterman  <andrew@sifive.com>
+
+	* config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
+	* config/riscv/riscv.md (clear_cache): Use it.
+
 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
 
 	* web.c: Remove out-of-date comment.
diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
index 6c7e3c4e819..4b2f7b6e1fd 100644
--- a/gcc/config/riscv/linux.h
+++ b/gcc/config/riscv/linux.h
@@ -45,6 +45,8 @@ along with GCC; see the file COPYING3.  If not see
 #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC " -latomic "
 #endif
 
+#define ICACHE_FLUSH_FUNC "__riscv_flush_icache"
+
 #define LINK_SPEC "\
 -melf" XLEN_SPEC "lriscv \
 %{shared} \
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index db4fed48e53..dab54ad2738 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1456,7 +1456,13 @@
    (match_operand 1 "pmode_register_operand")]
   ""
 {
+#ifdef ICACHE_FLUSH_FUNC
+  emit_library_call (gen_rtx_SYMBOL_REF (Pmode, ICACHE_FLUSH_FUNC),
+		     LCT_NORMAL, VOIDmode, operands[0], Pmode,
+		     operands[1], Pmode, const0_rtx, Pmode);
+#else
   emit_insn (gen_fence_i ());
+#endif
   DONE;
 })