From: Claudiu Zissulescu Date: Mon, 17 Jul 2017 12:32:02 +0000 (+0200) Subject: [ARC] Enable indexed loads for elf targers. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f26322a6f74f7d22bdee3a11b6b3ffbd1c2867a9;p=gcc.git [ARC] Enable indexed loads for elf targers. Enable indexed loads only for elf target, as the linux ones need more testing. gcc/ 2017-02-28 Claudiu Zissulescu * config/arc/arc.opt (mindexed-loads): Use initial value TARGET_INDEXED_LOADS_DEFAULT. (mauto-modify-reg): Use initial value TARGET_AUTO_MODIFY_REG_DEFAULT. * config/arc/elf.h (TARGET_INDEXED_LOADS_DEFAULT): Define. (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. * config/arc/linux.h (TARGET_INDEXED_LOADS_DEFAULT): Define. (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. From-SVN: r250274 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f241a89ad2c..5f5439ba81c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2017-07-17 Claudiu Zissulescu + + * config/arc/arc.opt (mindexed-loads): Use initial value + TARGET_INDEXED_LOADS_DEFAULT. + (mauto-modify-reg): Use initial value + TARGET_AUTO_MODIFY_REG_DEFAULT. + * config/arc/elf.h (TARGET_INDEXED_LOADS_DEFAULT): Define. + (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. + * config/arc/linux.h (TARGET_INDEXED_LOADS_DEFAULT): Define. + (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. + 2017-07-17 Martin Liska PR sanitizer/81302 diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt index f01a2ff0e58..ed2b8272733 100644 --- a/gcc/config/arc/arc.opt +++ b/gcc/config/arc/arc.opt @@ -270,11 +270,11 @@ Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_XMAC) Tune for ARC700 R4.2 Cpu with XMAC block. mindexed-loads -Target Var(TARGET_INDEXED_LOADS) +Target Var(TARGET_INDEXED_LOADS) Init(TARGET_INDEXED_LOADS_DEFAULT) Enable the use of indexed loads. mauto-modify-reg -Target Var(TARGET_AUTO_MODIFY_REG) +Target Var(TARGET_AUTO_MODIFY_REG) Init(TARGET_AUTO_MODIFY_REG_DEFAULT) Enable the use of pre/post modify with register displacement. mmul32x16 diff --git a/gcc/config/arc/elf.h b/gcc/config/arc/elf.h index c5794f8f785..43f3408bc08 100644 --- a/gcc/config/arc/elf.h +++ b/gcc/config/arc/elf.h @@ -58,3 +58,11 @@ along with GCC; see the file COPYING3. If not see /* Bare-metal toolchains do not need a thread pointer register. */ #undef TARGET_ARC_TP_REGNO_DEFAULT #define TARGET_ARC_TP_REGNO_DEFAULT -1 + +/* Indexed loads are default. */ +#undef TARGET_INDEXED_LOADS_DEFAULT +#define TARGET_INDEXED_LOADS_DEFAULT 1 + +/* Pre/post modify with register displacement are default. */ +#undef TARGET_AUTO_MODIFY_REG_DEFAULT +#define TARGET_AUTO_MODIFY_REG_DEFAULT 1 diff --git a/gcc/config/arc/linux.h b/gcc/config/arc/linux.h index 83e5a1d61f2..d8e006307fc 100644 --- a/gcc/config/arc/linux.h +++ b/gcc/config/arc/linux.h @@ -83,3 +83,11 @@ along with GCC; see the file COPYING3. If not see #define SUBTARGET_CPP_SPEC "\ %{pthread:-D_REENTRANT} \ " + +/* Indexed loads are default off. */ +#undef TARGET_INDEXED_LOADS_DEFAULT +#define TARGET_INDEXED_LOADS_DEFAULT 0 + +/* Pre/post modify with register displacement are default off. */ +#undef TARGET_AUTO_MODIFY_REG_DEFAULT +#define TARGET_AUTO_MODIFY_REG_DEFAULT 0