From: Dmitry Selyutin Date: Wed, 21 Sep 2022 08:39:00 +0000 (+0300) Subject: sv_binutils: generate svp64_cr_in2 opindices X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f2e8430bc3dcae4c4be2e14e58dbd49072f36b55;p=openpower-isa.git sv_binutils: generate svp64_cr_in2 opindices --- diff --git a/src/openpower/sv/sv_binutils.py b/src/openpower/sv/sv_binutils.py index 7f677b2c..77fe09a2 100644 --- a/src/openpower/sv/sv_binutils.py +++ b/src/openpower/sv/sv_binutils.py @@ -357,6 +357,7 @@ class Desc(Struct): extra_idx_out: Extra extra_idx_out2: Extra extra_idx_cr_in: Extra + extra_idx_cr_in2: Extra extra_idx_cr_out: Extra @classmethod @@ -450,7 +451,7 @@ class Codegen(_enum.Enum): enums = ( In1Sel, In2Sel, In3Sel, OutSel, - CRInSel, CROutSel, + CRInSel, CRIn2Sel, CROutSel, PType, EType, Extra, Mode, Function, ) @@ -548,6 +549,9 @@ class Codegen(_enum.Enum): CRInSel.BA: "BA", CRInSel.WHOLE_REG: "FXM", }) + yield from opindex(CRIn2Sel, "cr_in2", { + CRIn2Sel.BB: "BB", + }) yield from opindex(CROutSel, "cr_out", { CROutSel.BF: "BF", CROutSel.BT: "BT",