From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 2 Mar 2019 16:40:54 +0000 (-0800)
Subject: Merge pull request #843 from YosysHQ/clifford/mem2regconstidx
X-Git-Tag: yosys-0.9~278
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f2f5ecd83468fc94bf1ec8d72734fa531d0b2b32;p=yosys.git

Merge pull request #843 from YosysHQ/clifford/mem2regconstidx

Use mem2reg on memories that only have constant-index write ports
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f2f5ecd83468fc94bf1ec8d72734fa531d0b2b32