From: Jakub Jelinek Date: Tue, 27 Nov 2018 15:40:57 +0000 (+0100) Subject: re PR target/88188 (ICE in print_operand, at config/rs6000/rs6000.c) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f316c3e5a7b07e558a62fec06a81e555f8d35185;p=gcc.git re PR target/88188 (ICE in print_operand, at config/rs6000/rs6000.c) PR target/88188 * config/rs6000/rs6000.c (print_operand) : Use output_operand_lossage instead of gcc_assert. : Likewise. : Likewise. : Use output_operand_lossage instead of gcc_unreachable. * gcc.target/powerpc/pr88188.c: New test. From-SVN: r266515 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 96215ee5cd7..aea7767bde6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2018-11-27 Jakub Jelinek + + PR target/88188 + * config/rs6000/rs6000.c (print_operand) : Use + output_operand_lossage instead of gcc_assert. + : Likewise. + : Likewise. + : Use output_operand_lossage instead of gcc_unreachable. + 2018-11-27 Jeff Law * config/riscv/riscv (riscv_block_mvoe_straight): Use RETURN_BEGIN diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 276526381f1..965488caabf 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -20644,7 +20644,11 @@ print_operand (FILE *file, rtx x, int code) case 'D': /* Like 'J' but get to the GT bit only. */ - gcc_assert (REG_P (x)); + if (!REG_P (x)) + { + output_operand_lossage ("invalid %%D value"); + return; + } /* Bit 1 is GT bit. */ i = 4 * (REGNO (x) - CR0_REGNO) + 1; @@ -20900,7 +20904,11 @@ print_operand (FILE *file, rtx x, int code) case 't': /* Like 'J' but get to the OVERFLOW/UNORDERED bit. */ - gcc_assert (REG_P (x) && GET_MODE (x) == CCmode); + if (!REG_P (x) || GET_MODE (x) != CCmode) + { + output_operand_lossage ("invalid %%t value"); + return; + } /* Bit 3 is OV bit. */ i = 4 * (REGNO (x) - CR0_REGNO) + 3; @@ -20989,7 +20997,7 @@ print_operand (FILE *file, rtx x, int code) fputs ("lge", file); /* 5 */ break; default: - gcc_unreachable (); + output_operand_lossage ("invalid %%V value"); } break; @@ -21059,7 +21067,11 @@ print_operand (FILE *file, rtx x, int code) names. If we are configured for System V (or the embedded ABI) on the PowerPC, do not emit the period, since those systems do not use TOCs and the like. */ - gcc_assert (GET_CODE (x) == SYMBOL_REF); + if (!SYMBOL_REF_P (x)) + { + output_operand_lossage ("invalid %%z value"); + return; + } /* For macho, check to see if we need a stub. */ if (TARGET_MACHO) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e6bc1f8ce21..bf09d5c5730 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-11-27 Jakub Jelinek + + PR target/88188 + * gcc.target/powerpc/pr88188.c: New test. + 2018-11-27 Martin Liska * gfortran.dg/simd-builtins-1.f90: New test. diff --git a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c index 1d06be0e19e..cccb06927df 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c @@ -23,5 +23,5 @@ int h(int a, int b, int c, int d) return a; } -/* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { ! logical_op_short_circuit } } } } */ -/* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target logical_op_short_circuit } } } */ +/* { dg-final { scan-tree-dump-times "if" 0 "optimized" { target { { ! logical_op_short_circuit } || branch_cost } } } } */ +/* { dg-final { scan-tree-dump-times "if" 2 "optimized" { target { logical_op_short_circuit && { ! branch_cost } } } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr88188.c b/gcc/testsuite/gcc.target/powerpc/pr88188.c new file mode 100644 index 00000000000..5af08e5e3a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr88188.c @@ -0,0 +1,13 @@ +/* PR target/88188 */ +/* { dg-do compile } */ + +int m; + +void +foo (void) +{ + __asm volatile ("%D0" : : "m" (m)); /* { dg-error "invalid %D value" } */ + __asm volatile ("%t0" : : "m" (m)); /* { dg-error "invalid %t value" } */ + __asm volatile ("%V0" : : "r" (0)); /* { dg-error "invalid %V value" } */ + __asm volatile ("%z0" : : "r" (0)); /* { dg-error "invalid %z value" } */ +}