From: Naveen.H.S <naveen.hs@kpitcummins.com>
Date: Tue, 25 Mar 2008 13:41:23 +0000 (+0000)
Subject: sh.c (sh_expand_t_scc): Emit movrt for SH2A if possible.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f326a6cbc00ba13125882eb13d257660f2618d56;p=gcc.git

sh.c (sh_expand_t_scc): Emit movrt for SH2A if possible.

	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
	possible.
	* config/sh/sh.md (xorsi3_movrt, movrt): New insns.

	* gcc.target/sh/sh2a-movrt.c: New test.

From-SVN: r133517
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 339c91e3dd9..97b2f64c8fe 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2008-03-25  Naveen.H.S  <naveen.hs@kpitcummins.com>
+
+	* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
+	possible.
+	* config/sh/sh.md (xorsi3_movrt, movrt): New insns.
+
 2008-03-25  Naveen.H.S  <naveen.hs@kpitcummins.com>
 
 	* config/sh/sh.md (prefetch): Add condition for SH2A target.
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index df959d82746..699ac899bff 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -10605,6 +10605,9 @@ sh_expand_t_scc (enum rtx_code code, rtx target)
   val = INTVAL (sh_compare_op1);
   if ((code == EQ && val == 1) || (code == NE && val == 0))
     emit_insn (gen_movt (result));
+  else if (TARGET_SH2A && ((code == EQ && val == 0)
+			    || (code == NE && val == 1)))
+    emit_insn (gen_movrt (result));
   else if ((code == EQ && val == 0) || (code == NE && val == 1))
     {
       emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 0073370701e..61e902563ef 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -3326,6 +3326,15 @@ label:
 	xori	%1, %2, %0"
   [(set_attr "type" "arith_media")])
 
+;; Store the complements of the T bit in a register.
+(define_insn "xorsi3_movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+	(xor:SI (reg:SI T_REG)
+		(const_int 1)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+  [(set_attr "type" "arith")])
+
 (define_insn "xordi3"
   [(set (match_operand:DI 0 "arith_reg_dest" "=r,r")
 	(xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r")
@@ -9545,6 +9554,16 @@ mov.l\\t1f,r0\\n\\
   "movt	%0"
   [(set_attr "type" "arith")])
 
+;; complements the T bit and stores the result in a register
+(define_insn "movrt"
+  [(set (match_operand:SI 0 "arith_reg_dest" "=r")
+        (if_then_else (eq:SI (reg:SI T_REG) (const_int 0))
+        (const_int 1)
+        (const_int 0)))]
+  "TARGET_SH2A"
+  "movrt\\t%0"
+   [(set_attr "type" "arith")])
+
 (define_expand "seq"
   [(set (match_operand:SI 0 "arith_reg_dest" "")
 	(match_dup 1))]
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f61cfcf5507..da9126067ad 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2008-03-25  Naveen.H.S  <naveen.hs@kpitcummins.com>
+
+	* gcc.target/sh/sh2a-movrt.c: New test.
+
 2008-03-25  Naveen.H.S  <naveen.hs@kpitcummins.com>
 
 	* gcc.target/sh/sh2a-prefetch.c: New test.
diff --git a/gcc/testsuite/gcc.target/sh/sh2a-movrt.c b/gcc/testsuite/gcc.target/sh/sh2a-movrt.c
new file mode 100644
index 00000000000..9df9f4ba976
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sh/sh2a-movrt.c
@@ -0,0 +1,15 @@
+/* Testcase to check generation of a SH2A specific instruction for
+   'MOVRT Rn'.  */
+/* { dg-do assemble {target sh*-*-*}}  */
+/* { dg-options "-O1" }  */
+/* { dg-skip-if "" { "sh*-*-*" } "*" "-m2a -m2a-nofpu -m2a-single -m2a-single-only" }  */
+/* { dg-final { scan-assembler "movrt"} }  */
+
+int
+foo (void)
+{
+  int a, b, g, stop;
+  if (stop = ((a + b) % 2 != g))
+    ;
+  return stop;
+}