From: Luke Kenneth Casson Leighton Date: Sun, 16 Oct 2022 11:22:34 +0000 (+0100) Subject: sigh, have to use yield from on get_out_map() X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f34dceb82945ad22f149ae027ad1f440aa282347;p=openpower-isa.git sigh, have to use yield from on get_out_map() --- diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index f6869880..030ad3d5 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -571,7 +571,8 @@ def get_idx_out(dec2, name, ewmode=False): base = yield dec2.e.write_reg.base out = (out, base, offs) # identify which regnames map to out / o2 - if get_out_map(dec2, name): + ismap = yield from get_out_map(dec2, name) + if ismap: log("get_idx_out", name, out_sel, out, o_isvec) return out, o_isvec log("get_idx_out not found", name, out_sel, out, o_isvec) @@ -623,7 +624,8 @@ def get_idx_out2(dec2, name, ewmode=False): base = yield dec2.e.write_ea.base out = (out, base, offs) o_isvec = yield dec2.o2_isvec - if get_out2_map(dec2, name): + ismap = yield from get_out2_map(dec2, name) + if ismap: log("get_idx_out2", name, out_sel, out, out_ok, o_isvec) return out, o_isvec return None, False