From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 17 Jul 2020 18:58:48 +0000 (+0100)
Subject: comments
X-Git-Tag: semi_working_ecp5~701^2~2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f3611e74fe771b38ab0d9d45dd101a83265f4c73;p=soc.git

comments
---

diff --git a/src/soc/fu/spr/formal/proof_main_stage.py b/src/soc/fu/spr/formal/proof_main_stage.py
index 11ff8d8e..2c712115 100644
--- a/src/soc/fu/spr/formal/proof_main_stage.py
+++ b/src/soc/fu/spr/formal/proof_main_stage.py
@@ -23,7 +23,7 @@ from soc.decoder.power_enums import MicrOp, SPR, XER_bits
 from soc.decoder.power_fields import DecodeFields
 from soc.decoder.power_fieldsn import SignalBitRange
 
-
+# use POWER numbering. sigh.
 def xer_bit(name):
     return 63-XER_bits[name]