From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 23 Feb 2018 13:15:41 +0000 (+0100)
Subject: README: cleanup
X-Git-Tag: 24jan2021_ls180~1735
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f372e8c88054400a9c44d4fcf4d84fb072707f8a;p=litex.git

README: cleanup
---

diff --git a/README b/README
index 0f6d2521..72e1986a 100644
--- a/README
+++ b/README
@@ -11,7 +11,11 @@
 --------
 LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build
 our cores, integrate them in complete SoC and load/flash them to the hardware
-and experiment new features.
+and experiment new features. (structure is kept close to MiSoC to ease
+collaboration)
+
+Typical LiteX design flow:
+--------------------------
 
                         +---------------+
                         |FPGA toolchains|
@@ -26,15 +30,12 @@ and experiment new features.
 +----------------------+  |           |
 |LiteX Cores Ecosystem +-->           |
 +----------------------+  +-^-------^-+
- (Eth,,SATA,,DRAM,,USB,     |       |
-  PCIe,Video,etc...)        +       +
+ (Eth, SATA, DRAM, USB,     |       |
+  PCIe, Video, etc...)      +       +
                            board   target
                            file    file
 
 
-The structure of LiteX is kept close to MiSoC to ease collaboration between
-projects.
-
 [> Sub-packages
 ---------------
 gen: