From: lkcl <lkcl@web>
Date: Sat, 29 Jan 2022 23:31:33 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3231
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f39773bd829074b5f9d6b08292fb33538d4c9a91;p=libreriscv.git

---

diff --git a/shakti/m_class/sdram.mdwn b/shakti/m_class/sdram.mdwn
index 54cb59c69..0f4820ee2 100644
--- a/shakti/m_class/sdram.mdwn
+++ b/shakti/m_class/sdram.mdwn
@@ -4,4 +4,7 @@
 * <https://opencores.org/projects/sdr_ctrl>
 * WIP <https://gitlab.com/jock_tanner/asceticore/-/blob/master/control.py#L24-31>
 * simulation verilator https://github.com/ZipCPU/xulalx25soc/blob/master/bench/cpp/sdramsim.cpp
-* breakout board for FPGA <https://rlx.sk/en/breakout-boards-shields/5155-sdram-board-b-waveshare-8mx16bit-sdram-h57v1262gtr.html>
+* breakout board for FPGA
+  - <https://rlx.sk/en/breakout-boards-shields/5155-sdram-board-b-waveshare-8mx16bit-sdram-h57v1262gtr.html>
+  - <https://rarecomponents.com/store/sdram-board-b>
+  - <https://hackaday.io/project/20053-anacon-xc/log/54443-sdram-breakout-board-designed>