From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 28 Dec 2014 18:03:18 +0000 (+0100)
Subject: Fixed performance bug in object hashing
X-Git-Tag: yosys-0.5~202
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f3a97b75c78bd6f3670445129405213c0a015481;p=yosys.git

Fixed performance bug in object hashing
---

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index c262801dc..6f2d367d6 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -236,7 +236,7 @@ void RTLIL::Selection::optimize(RTLIL::Design *design)
 
 RTLIL::Design::Design()
 {
-	unsigned int hashidx_count = 0;
+	static unsigned int hashidx_count = 0;
 	hashidx_ = hashidx_count++;
 
 	refcount_modules_ = 0;
@@ -450,7 +450,7 @@ std::vector<RTLIL::Module*> RTLIL::Design::selected_whole_modules_warn() const
 
 RTLIL::Module::Module()
 {
-	unsigned int hashidx_count = 0;
+	static unsigned int hashidx_count = 0;
 	hashidx_ = hashidx_count++;
 
 	design = nullptr;
@@ -1741,7 +1741,7 @@ RTLIL::Cell* RTLIL::Module::addDlatchsrGate(RTLIL::IdString name, RTLIL::SigSpec
 
 RTLIL::Wire::Wire()
 {
-	unsigned int hashidx_count = 0;
+	static unsigned int hashidx_count = 0;
 	hashidx_ = hashidx_count++;
 
 	module = nullptr;
@@ -1755,7 +1755,7 @@ RTLIL::Wire::Wire()
 
 RTLIL::Memory::Memory()
 {
-	unsigned int hashidx_count = 0;
+	static unsigned int hashidx_count = 0;
 	hashidx_ = hashidx_count++;
 
 	width = 1;
@@ -1764,7 +1764,7 @@ RTLIL::Memory::Memory()
 
 RTLIL::Cell::Cell() : module(nullptr)
 {
-	unsigned int hashidx_count = 0;
+	static unsigned int hashidx_count = 0;
 	hashidx_ = hashidx_count++;
 }
 
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 8cf707999..f759a014f 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -712,7 +712,7 @@ struct RTLIL::Monitor
 	unsigned int hash() const { return hashidx_; }
 
 	Monitor() {
-		unsigned int hashidx_count = 0;
+		static unsigned int hashidx_count = 0;
 		hashidx_ = hashidx_count++;
 	}