From: lkcl <lkcl@web>
Date: Fri, 25 Dec 2020 01:32:13 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~930
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f3de51ca1a2f909fcf0635088ebbb769aade84aa;p=libreriscv.git

---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 88842148c..ad40ed02f 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -2,7 +2,7 @@
 
 [[!toc]]
 
-This document provides a crash-course overview as to why SV exists, and how it works.
+This document provides an overview and introduction as to why SV exists, and how it works.
 
 SIMD, the primary method for easy parallelism of the past 30 years in Computer Architectures, is [known to be harmful](https://www.sigarch.org/simd-instructions-considered-harmful/). SIMD provides
 a seductive simplicity that is easy to implement in hardware.  Even with predication added, SIMD only becomes more and more problematic with each power of two SIMD width increase introduced through an ISA revision.  The opcode proliferation, at O(N^6), inexorably spirals out of control in the ISA, the hardware, the software and the compilers.