From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 5 Nov 2015 11:37:43 +0000 (+0100)
Subject: Bugfix in mapping $tribuf to $_TBUF_
X-Git-Tag: yosys-0.6~74
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f401eeb0cf43f8b0e9431a02b3dd0780dcbceb32;p=yosys.git

Bugfix in mapping $tribuf to $_TBUF_
---

diff --git a/passes/techmap/simplemap.cc b/passes/techmap/simplemap.cc
index 956cd48fe..f6ac3964b 100644
--- a/passes/techmap/simplemap.cc
+++ b/passes/techmap/simplemap.cc
@@ -293,7 +293,7 @@ void simplemap_tribuf(RTLIL::Module *module, RTLIL::Cell *cell)
 		RTLIL::Cell *gate = module->addCell(NEW_ID, "$_TBUF_");
 		gate->add_strpool_attribute("\\src", cell->get_strpool_attribute("\\src"));
 		gate->setPort("\\A", sig_a[i]);
-		gate->setPort("\\E", sig_e[i]);
+		gate->setPort("\\E", sig_e);
 		gate->setPort("\\Y", sig_y[i]);
 	}
 }