From: Gabe Black <gblack@eecs.umich.edu>
Date: Sat, 16 Dec 2006 12:39:44 +0000 (-0500)
Subject: Don't have "predict" set the predicted target of the instruction. Do that explicitly... 
X-Git-Tag: m5_2.0_beta3~274^2~3
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f410d5f4e0348b4499f313fb3870a48183772c20;p=gem5.git

Don't have "predict" set the predicted target of the instruction. Do that explicitly when you use predict.

--HG--
extra : convert_revision : 8b613bb365b31ffaef1cea9fd789abe46219bdcf
---

diff --git a/src/cpu/o3/bpred_unit_impl.hh b/src/cpu/o3/bpred_unit_impl.hh
index 477c8e4cb..dbc603082 100644
--- a/src/cpu/o3/bpred_unit_impl.hh
+++ b/src/cpu/o3/bpred_unit_impl.hh
@@ -233,15 +233,6 @@ BPredUnit<Impl>::predict(DynInstPtr &inst, Addr &PC, unsigned tid)
         }
     }
 
-    if (pred_taken) {
-        // Set the PC and the instruction's predicted target.
-        PC = target;
-        inst->setPredTarg(target);
-    } else {
-        PC = PC + sizeof(MachInst);
-        inst->setPredTarg(PC);
-    }
-
     predHist[tid].push_front(predict_record);
 
     DPRINTF(Fetch, "[tid:%i]: predHist.size(): %i\n", tid, predHist[tid].size());