From: Vladimir Makarov <vmakarov@redhat.com>
Date: Mon, 26 Nov 2012 18:08:44 +0000 (+0000)
Subject: re PR target/55277 (ICE in assign_by_spills, at lra-assigns.c:1217)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f421c426a24f8e82c792bb4cdfbcd2f968cb83c2;p=gcc.git

re PR target/55277 (ICE in assign_by_spills, at lra-assigns.c:1217)

2012-11-26  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/55277
	* gcc.target/i386/pr55227.c: New test.

2012-11-26  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/55277
	* lra-constraints.c (in_class_p): Check reg class contents too.

From-SVN: r193824
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 51240799139..1c0aa9a0b2c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-26  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/55277
+	* lra-constraints.c (in_class_p): Check reg class contents too.
+
 2012-11-26  James Greenhalgh  <james.greenhalgh@arm.com>
 
 	* config/aarch64/aarch64-builtins.c (aarch64_builtin_decls): New.
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index e381c704227..d90ac0214d0 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -293,7 +293,9 @@ in_class_p (rtx reg, enum reg_class cl, enum reg_class *new_class)
 	  if (nregs == 1)
 	    return true;
 	  for (j = 0; j < nregs; j++)
-	    if (TEST_HARD_REG_BIT (lra_no_alloc_regs, hard_regno + j))
+	    if (TEST_HARD_REG_BIT (lra_no_alloc_regs, hard_regno + j)
+		|| ! TEST_HARD_REG_BIT (reg_class_contents[common_class],
+					hard_regno + j))
 	      break;
 	  if (j >= nregs)
 	    return true;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ed2bea89c63..9ce1761c14b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-26  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/55277
+	* gcc.target/i386/pr55227.c: New test.
+
 2012-11-26  Steven Bosscher  <steven@gcc.gnu.org>
 
 	* testsuite/gcc.dg/20050811-1.c: Change -dv option to -graph option
diff --git a/gcc/testsuite/gcc.target/i386/pr55277.c b/gcc/testsuite/gcc.target/i386/pr55277.c
new file mode 100644
index 00000000000..0bdcdc47f6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr55277.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-O1" } */
+
+int a, c;
+
+void f(long long p)
+{
+  long long b;
+
+  if(b)
+    b = p ? : 0;
+
+  for (; p; p++)
+    p *= a & (c = p *= !a < 2);
+
+  a = b += !(b & 3740917449u);
+}