From: lkcl <lkcl@web>
Date: Sat, 21 Nov 2020 20:32:50 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~1702
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f44cf1e163bef088d888f986465c1ca81623d0de;p=libreriscv.git

---

diff --git a/openpower/sv/vector_swizzle.mdwn b/openpower/sv/vector_swizzle.mdwn
index 0e2b61829..5b578b7e0 100644
--- a/openpower/sv/vector_swizzle.mdwn
+++ b/openpower/sv/vector_swizzle.mdwn
@@ -1,5 +1,7 @@
 # SV Vector Prefix Swizzle
 
+<https://bugs.libre-soc.org/show_bug.cgi?id=139>
+
 3D GPU operations on batches of vec2, vec3 and vec4 often require re-ordering of the elements in an "out of lane" fashion with respect to standard high performance non-GPU-centric Vector Processors.  Examples include:
 
 * Normalisation of Vectors of XYZ with respect to one dimension