From: lkcl Date: Sat, 26 Dec 2020 17:40:16 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~832 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f47c41c8061725669a2075741767c514811410b4;p=libreriscv.git --- diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn index 94825dabb..acfb79782 100644 --- a/openpower/sv/svp64/appendix.mdwn +++ b/openpower/sv/svp64/appendix.mdwn @@ -55,7 +55,7 @@ Table 9: Primary Opcode Map (opcode bits 0:5) ## Suitable for svp64 -This is the same table containing v3.0B Primary Opcodes except those that make mo sense in a Vectorisation Context have been removed. These removed POs can, *in the SV Vector Context only*, be assigned to alternative (Vectorised-only) instructions, including future extensions. +This is the same table containing v3.0B Primary Opcodes except those that make no sense in a Vectorisation Context have been removed. These removed POs can, *in the SV Vector Context only*, be assigned to alternative (Vectorised-only) instructions, including future extensions. Note, again, to emphasise: outside of svp64 these opcodes **do not** change. When not prefixed with svp64 these opcodes **specifically** retain their v3.0B / v3.1B OpenPOWER Standard compliant meaning.