From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 18 Jun 2022 12:54:02 +0000 (+0100)
Subject: clarify
X-Git-Tag: opf_rfc_ls005_v1~1715
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f4b80629a29f7a6ce9842c522f3edeac5b501d53;p=libreriscv.git

clarify
---

diff --git a/svp64-primer/summary.tex b/svp64-primer/summary.tex
index 4ad918061..b459542d3 100644
--- a/svp64-primer/summary.tex
+++ b/svp64-primer/summary.tex
@@ -1,6 +1,6 @@
 \section{Summary}
 Simple-V is a Scalable Vector Specification for a hardware for-loop that
-ONLY uses scalar instructions. Advantages:
+ONLY uses scalar instructions.
 
 \begin{itemize}
 \item The Power ISA v3.1 Specification is not altered in any way.
@@ -28,8 +28,8 @@ ONLY uses scalar instructions. Advantages:
 
 All areas investigated so far consistently showed reductions in executable
 size, which as outlined in \cite{SIMD_HARM} has an indirect reduction in
-power consumption due both to less I-Cache/TLB pressure and Issue remaining
-idle.
+power consumption due to less I-Cache/TLB pressure and also Issue remaining
+idle for long periods.
 
 
 \subsection{What is SIMD?}