From: Claudiu Zissulescu <claziss@synopsys.com>
Date: Thu, 1 Jun 2017 09:41:13 +0000 (+0200)
Subject: [ARC] Make mulsi for A700 pattern commutative.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f533fdf6cc37bdc5b1dec5c622733da97a09f97e;p=gcc.git

[ARC] Make mulsi for A700 pattern commutative.

gcc/
2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (mulsi3_700): Make it commutative.

From-SVN: r248776
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b145573cd65..2af5953aaee 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2017-06-01  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/arc/arc.md (mulsi3_700): Make it commutative.
+
 2017-06-01  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
 	* config/sparc/sparc.md (*zero_extendsidi2_insn_sp64): Set insn
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index ec783a047f2..cce5973ce6c 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -2127,7 +2127,7 @@
 ; like MPY or MPYU.
 (define_insn "mulsi3_700"
  [(set (match_operand:SI 0 "mpy_dest_reg_operand"        "=Rcr,r,r,Rcr,r")
-	(mult:SI (match_operand:SI 1 "register_operand"  " 0,c,0,0,c")
+	(mult:SI (match_operand:SI 1 "register_operand"  "%0,c,0,0,c")
 		 (match_operand:SI 2 "nonmemory_operand" "cL,cL,I,Cal,Cal")))]
  "TARGET_ARC700_MPY"
   "mpyu%? %0,%1,%2"