From: lkcl <lkcl@web>
Date: Mon, 3 Oct 2022 19:22:25 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~225
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f540eb175c058201a4fa5e14e69fe5355a857dd8;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index dd8e320f0..3bf8a9309 100644
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -30,8 +30,15 @@ Requester: Libre-SOC
 
 Impact on processor:
 
-    Addition of two new Floating-Point instructions
+    Addition of two new FPR-based instructions
     (potentially 4 if EXT001 Prefixed variants added)
 
 Impact on software:
 
+    Requires support for new instructions in assembler, debuggers,
+    and related tools.
+
+Keywords:
+
+    FPR, Floating-point, Load-immediate, BF16, FP32
+