From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Thu, 25 Jun 2020 09:18:40 +0000 (+0100)
Subject: arch-arm: Fix arm switcheroo regressions
X-Git-Tag: v20.1.0.0~536
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f55510c303cfae7d25c2169fac7a254b4a66bc74;p=gem5.git

arch-arm: Fix arm switcheroo regressions

These were failing with the combination of:

https://gem5-review.googlesource.com/c/public/gem5/+/29233

with

https://gem5-review.googlesource.com/c/public/gem5/+/27967

Change-Id: I8d3c3701faf4828e76aaa2cb895b9589f057d370
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30616
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index f88d2ef07..a48b3495f 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -428,7 +428,6 @@ ISA::startup()
         setupThreadContext();
 
     afterStartup = true;
-    selfDebug->init(tc);
 }
 
 void
@@ -439,6 +438,8 @@ ISA::setupThreadContext()
     if (!system)
         return;
 
+    selfDebug->init(tc);
+
     Gicv3 *gicv3 = dynamic_cast<Gicv3 *>(system->getGIC());
     if (!gicv3)
         return;