From: Uros Bizjak Date: Thu, 4 Oct 2018 19:52:44 +0000 (+0200) Subject: i386.md (*fop__2_i387): Macroize insn from *fop__2_i387... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f556d6b5d193dc23d2e65c5c06ee62ad5f25e59a;p=gcc.git i386.md (*fop__2_i387): Macroize insn from *fop__2_i387 and *fop_xf_2_i387 using X87MODEF... * config/i386/i386.md (*fop__2_i387): Macroize insn from *fop__2_i387 and *fop_xf_2_i387 using X87MODEF mode iterator. (*fop__3_i387): Macroize insn from *fop__3_i387 and *fop_xf_3_i387 using X87MODEF mode iterator. From-SVN: r264855 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f6de4aab25f..9504cfe74e2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2018-10-04 Uros Bizjak + + * config/i386/i386.md (*fop__2_i387): Macroize insn + from *fop__2_i387 and *fop_xf_2_i387 using + X87MODEF mode iterator. + (*fop__3_i387): Macroize insn from + *fop__3_i387 and *fop_xf_3_i387 using + X87MODEF mode iterator. + 2018-10-04 Vinay Kumar * doc/invoke.texi (-Wno-prio-ctor-dtor): Document new warning diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 39b220e9a00..122e57f98cc 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -14732,6 +14732,20 @@ ;; Gcc is slightly more smart about handling normal two address instructions ;; so use special patterns for add and mull. +(define_insn "*fop_xf_comm_i387" + [(set (match_operand:XF 0 "register_operand" "=f") + (match_operator:XF 3 "binary_fp_operator" + [(match_operand:XF 1 "register_operand" "%0") + (match_operand:XF 2 "register_operand" "f")]))] + "TARGET_80387 + && COMMUTATIVE_ARITH_P (operands[3])" + "* return output_387_binary_op (insn, operands);" + [(set (attr "type") + (if_then_else (match_operand:XF 3 "mult_operator") + (const_string "fmul") + (const_string "fop"))) + (set_attr "mode" "XF")]) + (define_insn "*fop__comm" [(set (match_operand:MODEF 0 "register_operand" "=f,x,v") (match_operator:MODEF 3 "binary_fp_operator" @@ -14780,6 +14794,20 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "SF")]) +(define_insn "*fop_xf_1_i387" + [(set (match_operand:XF 0 "register_operand" "=f,f") + (match_operator:XF 3 "binary_fp_operator" + [(match_operand:XF 1 "register_operand" "0,f") + (match_operand:XF 2 "register_operand" "f,0")]))] + "TARGET_80387 + && !COMMUTATIVE_ARITH_P (operands[3])" + "* return output_387_binary_op (insn, operands);" + [(set (attr "type") + (if_then_else (match_operand:XF 3 "div_operator") + (const_string "fdiv") + (const_string "fop"))) + (set_attr "mode" "XF")]) + (define_insn "*fop__1" [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,v") (match_operator:MODEF 3 "binary_fp_operator" @@ -14816,49 +14844,65 @@ (symbol_ref "true") (symbol_ref "false"))))]) -;; ??? Add SSE splitters for these! -(define_insn "*fop__2_i387" - [(set (match_operand:MODEF 0 "register_operand" "=f") - (match_operator:MODEF 3 "binary_fp_operator" - [(float:MODEF +(define_insn "*fop__2_i387" + [(set (match_operand:X87MODEF 0 "register_operand" "=f") + (match_operator:X87MODEF 3 "binary_fp_operator" + [(float:X87MODEF (match_operand:SWI24 1 "nonimmediate_operand" "m")) - (match_operand:MODEF 2 "register_operand" "0")]))] - "TARGET_80387 && X87_ENABLE_FLOAT (mode, mode) - && !(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) + (match_operand:X87MODEF 2 "register_operand" "0")]))] + "TARGET_80387 && X87_ENABLE_FLOAT (mode, mode) + && !(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) && (TARGET_USE_MODE_FIOP || optimize_function_for_size_p (cfun))" "* return output_387_binary_op (insn, operands);" [(set (attr "type") - (cond [(match_operand:MODEF 3 "mult_operator") - (const_string "fmul") - (match_operand:MODEF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) + (cond [(match_operand:X87MODEF 3 "mult_operator") + (const_string "fmul") + (match_operand:X87MODEF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) (set_attr "fp_int_src" "true") (set_attr "mode" "")]) -(define_insn "*fop__3_i387" - [(set (match_operand:MODEF 0 "register_operand" "=f") - (match_operator:MODEF 3 "binary_fp_operator" - [(match_operand:MODEF 1 "register_operand" "0") - (float:MODEF +(define_insn "*fop__3_i387" + [(set (match_operand:X87MODEF 0 "register_operand" "=f") + (match_operator:X87MODEF 3 "binary_fp_operator" + [(match_operand:X87MODEF 1 "register_operand" "0") + (float:X87MODEF (match_operand:SWI24 2 "nonimmediate_operand" "m"))]))] - "TARGET_80387 && X87_ENABLE_FLOAT (mode, mode) - && !(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) + "TARGET_80387 && X87_ENABLE_FLOAT (mode, mode) + && !(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) && (TARGET_USE_MODE_FIOP || optimize_function_for_size_p (cfun))" "* return output_387_binary_op (insn, operands);" [(set (attr "type") - (cond [(match_operand:MODEF 3 "mult_operator") - (const_string "fmul") - (match_operand:MODEF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) + (cond [(match_operand:X87MODEF 3 "mult_operator") + (const_string "fmul") + (match_operand:X87MODEF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) (set_attr "fp_int_src" "true") (set_attr "mode" "")]) +(define_insn "*fop_xf_4_i387" + [(set (match_operand:XF 0 "register_operand" "=f,f") + (match_operator:XF 3 "binary_fp_operator" + [(float_extend:XF + (match_operand:MODEF 1 "nonimmediate_operand" "fm,0")) + (match_operand:XF 2 "register_operand" "0,f")]))] + "TARGET_80387" + "* return output_387_binary_op (insn, operands);" + [(set (attr "type") + (cond [(match_operand:XF 3 "mult_operator") + (const_string "fmul") + (match_operand:XF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) + (set_attr "mode" "")]) + (define_insn "*fop_df_4_i387" [(set (match_operand:DF 0 "register_operand" "=f,f") (match_operator:DF 3 "binary_fp_operator" @@ -14869,151 +14913,49 @@ && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") - (cond [(match_operand:DF 3 "mult_operator") - (const_string "fmul") - (match_operand:DF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) + (cond [(match_operand:DF 3 "mult_operator") + (const_string "fmul") + (match_operand:DF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) (set_attr "mode" "SF")]) -(define_insn "*fop_df_5_i387" - [(set (match_operand:DF 0 "register_operand" "=f,f") - (match_operator:DF 3 "binary_fp_operator" - [(match_operand:DF 1 "register_operand" "0,f") - (float_extend:DF - (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] - "TARGET_80387 && X87_ENABLE_ARITH (DFmode) - && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" +(define_insn "*fop_xf_5_i387" + [(set (match_operand:XF 0 "register_operand" "=f,f") + (match_operator:XF 3 "binary_fp_operator" + [(match_operand:XF 1 "register_operand" "0,f") + (float_extend:XF + (match_operand:MODEF 2 "nonimmediate_operand" "fm,0"))]))] + "TARGET_80387" "* return output_387_binary_op (insn, operands);" [(set (attr "type") - (cond [(match_operand:DF 3 "mult_operator") - (const_string "fmul") - (match_operand:DF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "mode" "SF")]) + (cond [(match_operand:XF 3 "mult_operator") + (const_string "fmul") + (match_operand:XF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) + (set_attr "mode" "")]) -(define_insn "*fop_df_6_i387" +(define_insn "*fop_df_5_i387" [(set (match_operand:DF 0 "register_operand" "=f,f") (match_operator:DF 3 "binary_fp_operator" - [(float_extend:DF - (match_operand:SF 1 "register_operand" "0,f")) + [(match_operand:DF 1 "register_operand" "0,f") (float_extend:DF (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] "TARGET_80387 && X87_ENABLE_ARITH (DFmode) && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") - (cond [(match_operand:DF 3 "mult_operator") - (const_string "fmul") - (match_operand:DF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) + (cond [(match_operand:DF 3 "mult_operator") + (const_string "fmul") + (match_operand:DF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) (set_attr "mode" "SF")]) -(define_insn "*fop_xf_comm_i387" - [(set (match_operand:XF 0 "register_operand" "=f") - (match_operator:XF 3 "binary_fp_operator" - [(match_operand:XF 1 "register_operand" "%0") - (match_operand:XF 2 "register_operand" "f")]))] - "TARGET_80387 - && COMMUTATIVE_ARITH_P (operands[3])" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (if_then_else (match_operand:XF 3 "mult_operator") - (const_string "fmul") - (const_string "fop"))) - (set_attr "mode" "XF")]) - -(define_insn "*fop_xf_1_i387" - [(set (match_operand:XF 0 "register_operand" "=f,f") - (match_operator:XF 3 "binary_fp_operator" - [(match_operand:XF 1 "register_operand" "0,f") - (match_operand:XF 2 "register_operand" "f,0")]))] - "TARGET_80387 - && !COMMUTATIVE_ARITH_P (operands[3])" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (if_then_else (match_operand:XF 3 "div_operator") - (const_string "fdiv") - (const_string "fop"))) - (set_attr "mode" "XF")]) - -(define_insn "*fop_xf_2_i387" - [(set (match_operand:XF 0 "register_operand" "=f") - (match_operator:XF 3 "binary_fp_operator" - [(float:XF - (match_operand:SWI24 1 "nonimmediate_operand" "m")) - (match_operand:XF 2 "register_operand" "0")]))] - "TARGET_80387 - && (TARGET_USE_MODE_FIOP || optimize_function_for_size_p (cfun))" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (cond [(match_operand:XF 3 "mult_operator") - (const_string "fmul") - (match_operand:XF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "fp_int_src" "true") - (set_attr "mode" "")]) - -(define_insn "*fop_xf_3_i387" - [(set (match_operand:XF 0 "register_operand" "=f") - (match_operator:XF 3 "binary_fp_operator" - [(match_operand:XF 1 "register_operand" "0") - (float:XF - (match_operand:SWI24 2 "nonimmediate_operand" "m"))]))] - "TARGET_80387 - && (TARGET_USE_MODE_FIOP || optimize_function_for_size_p (cfun))" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (cond [(match_operand:XF 3 "mult_operator") - (const_string "fmul") - (match_operand:XF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "fp_int_src" "true") - (set_attr "mode" "")]) - -(define_insn "*fop_xf_4_i387" - [(set (match_operand:XF 0 "register_operand" "=f,f") - (match_operator:XF 3 "binary_fp_operator" - [(float_extend:XF - (match_operand:MODEF 1 "nonimmediate_operand" "fm,0")) - (match_operand:XF 2 "register_operand" "0,f")]))] - "TARGET_80387" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (cond [(match_operand:XF 3 "mult_operator") - (const_string "fmul") - (match_operand:XF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "mode" "")]) - -(define_insn "*fop_xf_5_i387" - [(set (match_operand:XF 0 "register_operand" "=f,f") - (match_operator:XF 3 "binary_fp_operator" - [(match_operand:XF 1 "register_operand" "0,f") - (float_extend:XF - (match_operand:MODEF 2 "nonimmediate_operand" "fm,0"))]))] - "TARGET_80387" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (cond [(match_operand:XF 3 "mult_operator") - (const_string "fmul") - (match_operand:XF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "mode" "")]) - (define_insn "*fop_xf_6_i387" [(set (match_operand:XF 0 "register_operand" "=f,f") (match_operator:XF 3 "binary_fp_operator" @@ -15024,13 +14966,32 @@ "TARGET_80387" "* return output_387_binary_op (insn, operands);" [(set (attr "type") - (cond [(match_operand:XF 3 "mult_operator") - (const_string "fmul") - (match_operand:XF 3 "div_operator") - (const_string "fdiv") - ] - (const_string "fop"))) + (cond [(match_operand:XF 3 "mult_operator") + (const_string "fmul") + (match_operand:XF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) (set_attr "mode" "")]) + +(define_insn "*fop_df_6_i387" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (match_operator:DF 3 "binary_fp_operator" + [(float_extend:DF + (match_operand:SF 1 "register_operand" "0,f")) + (float_extend:DF + (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] + "TARGET_80387 && X87_ENABLE_ARITH (DFmode) + && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" + "* return output_387_binary_op (insn, operands);" + [(set (attr "type") + (cond [(match_operand:DF 3 "mult_operator") + (const_string "fmul") + (match_operand:DF 3 "div_operator") + (const_string "fdiv") + ] + (const_string "fop"))) + (set_attr "mode" "SF")]) ;; FPU special functions.