From: Luke Kenneth Casson Leighton Date: Tue, 22 Sep 2020 08:50:35 +0000 (+0100) Subject: add MMU (commented out) X-Git-Tag: 24jan2021_ls180~362 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f561242004f065fac56d1db5e712687694f6e53c;p=soc.git add MMU (commented out) --- diff --git a/src/soc/fu/compunits/compunits.py b/src/soc/fu/compunits/compunits.py index 9d1c0b20..096cda34 100644 --- a/src/soc/fu/compunits/compunits.py +++ b/src/soc/fu/compunits/compunits.py @@ -247,7 +247,7 @@ class AllFunctionUnits(Elaboratable): 'spr': 1, 'logical': 1, 'mul': 1, - 'mmu': 1, + #'mmu': 1, 'div': 1, 'shiftrot': 1} alus = {'alu': ALUFunctionUnit, 'cr': CRFunctionUnit, diff --git a/src/soc/simple/core.py b/src/soc/simple/core.py index 3a9b5a89..356e6198 100644 --- a/src/soc/simple/core.py +++ b/src/soc/simple/core.py @@ -74,6 +74,11 @@ class NonProductionCore(Elaboratable): self.l0 = TstL0CacheBuffer(pspec, n_units=1) pi = self.l0.l0.dports[0] + if False: + # MMU / DCache + self.mmu = MMU() + self.dcache = DCache() + # function units (only one each) self.fus = AllFunctionUnits(pspec, pilist=[pi])