From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 29 Mar 2019 14:18:07 +0000 (+0000)
Subject: imports: get div and mul working
X-Git-Tag: ls180-24jan2020~1373
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f570ca072a2c56bb6a7546e60f6f772adcc4138f;p=ieee754fpu.git

imports: get div and mul working
---

diff --git a/src/add/fmul.py b/src/add/fmul.py
index 8e928bb7..a65700eb 100644
--- a/src/add/fmul.py
+++ b/src/add/fmul.py
@@ -1,8 +1,8 @@
 from nmigen import Module, Signal, Cat, Mux, Array, Const
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase
-from nmigen_add_experiment import FPState, FPGetOp
+from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPState
+from fpcommon.getop import FPGetOp
 
 
 class FPMUL(FPBase):
diff --git a/src/add/nmigen_div_experiment.py b/src/add/nmigen_div_experiment.py
index e074c5c6..abbcf95f 100644
--- a/src/add/nmigen_div_experiment.py
+++ b/src/add/nmigen_div_experiment.py
@@ -5,8 +5,8 @@
 from nmigen import Module, Signal, Const, Cat
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase
-from nmigen_add_experiment import FPState, FPGetOp
+from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPState
+from fpcommon.getop import FPGetOp
 
 class Div:
     def __init__(self, width):