From: Francisco Jerez <currojerez@riseup.net>
Date: Wed, 5 Aug 2015 13:43:37 +0000 (+0300)
Subject: i965/fs: Lower 32x32 bit multiplication on BXT.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f5b37fb1acad9cf044b7b6d4fa5f2582bd8bc7f4;p=mesa.git

i965/fs: Lower 32x32 bit multiplication on BXT.

AFAIK BXT has the same annoying alignment limitation as CHV on the
source register regions of 32x32 bit MULs, give it the same treatment.

Reviewed-by: Matt Turner <mattst88@gmail.com>
---

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 15fe3648af8..0278237101e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3130,9 +3130,9 @@ fs_visitor::lower_integer_multiplication()
    bool progress = false;
 
    /* Gen8's MUL instruction can do a 32-bit x 32-bit -> 32-bit operation
-    * directly, but Cherryview cannot.
+    * directly, but CHV/BXT cannot.
     */
-   if (devinfo->gen >= 8 && !devinfo->is_cherryview)
+   if (devinfo->gen >= 8 && !devinfo->is_cherryview && !devinfo->is_broxton)
       return false;
 
    foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {