From: Teguh Hofstee <5227572+hofstee@users.noreply.github.com>
Date: Thu, 23 Apr 2020 21:46:10 +0000 (-0700)
Subject: back.verilog: add workaround for evaluation Verific behavior.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f5fe853a51918b5a81c9c0afb2eb28ff79738692;p=nmigen.git

back.verilog: add workaround for evaluation Verific behavior.

The evaluation version of Verific prints its license information to stdout,
and since it is against the EULA to change that in any way, this behavior
is not possible to fix in Yosys. Add a workaround in nMigen instead.
---

diff --git a/nmigen/back/verilog.py b/nmigen/back/verilog.py
index 6e2185a..04e19b6 100644
--- a/nmigen/back/verilog.py
+++ b/nmigen/back/verilog.py
@@ -1,6 +1,7 @@
 import os
 import re
 import subprocess
+import itertools
 
 from .._toolchain import *
 from . import rtlil
@@ -17,6 +18,7 @@ def _yosys_version():
     yosys_path = require_tool("yosys")
     version = subprocess.check_output([yosys_path, "-V"], encoding="utf-8")
     # If Yosys is built with Verific, then Verific license information is printed first.
+    # See below for details.
     m = re.search(r"^Yosys ([\d.]+)(?:\+(\d+))?", version, flags=re.M)
     tag, offset = m[1], m[2] or 0
     return tuple(map(int, tag.split("."))), offset
@@ -65,6 +67,13 @@ write_verilog -norename {write_verilog_opts}
     if popen.returncode:
         raise YosysError(error.strip())
     else:
+        # If Yosys is built with an evaluation version of Verific, then Verific license information 
+        # is printed first. It consists of empty lines and lines starting with `--`, which are not
+        # valid at the start of a Verilog file, and thus may be reliably removed.
+        verilog_text = "\n".join(itertools.dropwhile(
+            lambda x: x == "" or x.startswith("--"),
+            verilog_text.splitlines()
+        ))
         return verilog_text