From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 26 Mar 2019 02:44:32 +0000 (+0000)
Subject: cosmetic change 3
X-Git-Tag: convert-csv-opcode-to-binary~4721
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f5ffc5fe0d9c792c5e3942bcc04ab8ffdc6075f7;p=libreriscv.git

cosmetic change 3
---

diff --git a/3d_gpu/spike_sv.mdwn b/3d_gpu/spike_sv.mdwn
index d960142b5..6981e4f3f 100644
--- a/3d_gpu/spike_sv.mdwn
+++ b/3d_gpu/spike_sv.mdwn
@@ -37,7 +37,8 @@ will stop the execution of either command.
 
 ####3. Clone and check out Simple-V riscv-isa-sim:
 
-  This is a repository used by libre and contains an augmented version of the spike simulator . Do not clone these inside riscv-tools!
+  This is a repository used by libre and contains an augmented version
+  of the spike simulator. Do not clone these inside riscv-tools!
 
 > 1. Clone Simple-V riscv-isa-sim
     * git clone https://git.libre-riscv.org/git/riscv-isa-sim.git