From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 26 Mar 2019 02:30:09 +0000 (+0000)
Subject: extraneous spelling correction
X-Git-Tag: convert-csv-opcode-to-binary~4726
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f602f51a26daf4b01c78fbdd4892160c75931a36;p=libreriscv.git

extraneous spelling correction
---

diff --git a/shakti/m_class/AXI.mdwn b/shakti/m_class/AXI.mdwn
index 61beb10e3..48c152953 100644
--- a/shakti/m_class/AXI.mdwn
+++ b/shakti/m_class/AXI.mdwn
@@ -6,6 +6,6 @@ See also [[wishbone]] Bus
 * <https://github.com/alexforencich/verilog-axis>
 * <https://github.com/qermit/WishboneAXI/tree/master/cores/Wishbone2AXI/hdl>
 
-# AXI4 in nmigen
+# AXI4 in migen
 
 * <https://github.com/peteut/migen-axi>