From: Chung-Ju Wu Date: Sat, 7 Apr 2018 04:07:53 +0000 (+0000) Subject: [NDS32] Support [$ra + $rb << 3] form for load/store address. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f62a2af5dfaee45ae09bd170904daae80d822866;p=gcc.git [NDS32] Support [$ra + $rb << 3] form for load/store address. gcc/ * config/nds32/nds32.c (nds32_legitimate_index_p): Modify condition for load/store addressing form. (nds32_print_operand_address): Likewise. From-SVN: r259201 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f5273744037..d6c631cd59c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-04-07 Chung-Ju Wu + + * config/nds32/nds32.c (nds32_legitimate_index_p): Modify condition + for load/store addressing form. + (nds32_print_operand_address): Likewise. + 2018-04-06 Eric Botcazou PR target/85196 diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index 030fb2e0224..b4c31a4a90f 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -1246,9 +1246,10 @@ nds32_legitimate_index_p (machine_mode outer_mode, int multiplier; multiplier = INTVAL (op1); - /* We only allow (mult reg const_int_1) - or (mult reg const_int_2) or (mult reg const_int_4). */ - if (multiplier != 1 && multiplier != 2 && multiplier != 4) + /* We only allow (mult reg const_int_1), (mult reg const_int_2), + (mult reg const_int_4) or (mult reg const_int_8). */ + if (multiplier != 1 && multiplier != 2 + && multiplier != 4 && multiplier != 8) return false; regno = REGNO (op0); @@ -1273,8 +1274,9 @@ nds32_legitimate_index_p (machine_mode outer_mode, sv = INTVAL (op1); /* We only allow (ashift reg const_int_0) - or (ashift reg const_int_1) or (ashift reg const_int_2). */ - if (sv != 0 && sv != 1 && sv !=2) + or (ashift reg const_int_1) or (ashift reg const_int_2) or + (ashift reg const_int_3). */ + if (sv != 0 && sv != 1 && sv !=2 && sv != 3) return false; regno = REGNO (op0); @@ -2926,6 +2928,8 @@ nds32_print_operand_address (FILE *stream, machine_mode /*mode*/, rtx x) sv = 1; else if (INTVAL (XEXP (op0, 1)) == 4) sv = 2; + else if (INTVAL (XEXP (op0, 1)) == 8) + sv = 3; else gcc_unreachable ();