From: Jason Ekstrand Date: Fri, 1 Jan 2016 22:09:17 +0000 (-0800) Subject: anv/image_view: Separate vulkan and isl formats X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f665fdf0e7295808edc2de3397f6f434bf223b39;p=mesa.git anv/image_view: Separate vulkan and isl formats Previously, anv_image_view had a anv_format pointer that we used for everything. This commit replaces that pointer with a VkFormat enum copied from the API and an isl_format. In order to implement RGB formats, we have to use a different isl_format for the actual surface state than the obvious one from the VkFormat. Separating the two helps us keep things streight. --- diff --git a/src/vulkan/anv_cmd_buffer.c b/src/vulkan/anv_cmd_buffer.c index 2f19c75e7cc..49bb298a188 100644 --- a/src/vulkan/anv_cmd_buffer.c +++ b/src/vulkan/anv_cmd_buffer.c @@ -1075,7 +1075,8 @@ anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer) const struct anv_image_view *iview = fb->attachments[subpass->depth_stencil_attachment]; - assert(anv_format_is_depth_or_stencil(iview->format)); + assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | + VK_IMAGE_ASPECT_STENCIL_BIT)); return iview; } diff --git a/src/vulkan/anv_image.c b/src/vulkan/anv_image.c index 5bee5a236e8..bd550890596 100644 --- a/src/vulkan/anv_image.c +++ b/src/vulkan/anv_image.c @@ -210,6 +210,7 @@ anv_image_create(VkDevice _device, image->levels = pCreateInfo->mipLevels; image->array_size = pCreateInfo->arrayLayers; image->usage = anv_image_get_full_usage(pCreateInfo); + image->tiling = pCreateInfo->tiling; if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT) { image->needs_nonrt_surface_state = true; @@ -440,7 +441,9 @@ anv_image_view_init(struct anv_image_view *iview, iview->offset = image->offset + surface->offset; iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask; - iview->format = anv_format_for_vk_format(pCreateInfo->format); + iview->vk_format = pCreateInfo->format; + iview->format = anv_get_isl_format(pCreateInfo->format, iview->aspect_mask, + image->tiling); iview->extent = (VkExtent3D) { .width = anv_minify(image->extent.width, range->baseMipLevel), diff --git a/src/vulkan/anv_meta_clear.c b/src/vulkan/anv_meta_clear.c index 17a40cd6be6..6873c4e8e6b 100644 --- a/src/vulkan/anv_meta_clear.c +++ b/src/vulkan/anv_meta_clear.c @@ -759,7 +759,7 @@ void anv_CmdClearColorImage( .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, .attachmentCount = 1, .pAttachments = &(VkAttachmentDescription) { - .format = iview.format->vk_format, + .format = iview.vk_format, .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, .storeOp = VK_ATTACHMENT_STORE_OP_STORE, .initialLayout = VK_IMAGE_LAYOUT_GENERAL, diff --git a/src/vulkan/anv_private.h b/src/vulkan/anv_private.h index 76c47de594a..8667b45cfc0 100644 --- a/src/vulkan/anv_private.h +++ b/src/vulkan/anv_private.h @@ -1453,6 +1453,7 @@ struct anv_image { uint32_t levels; uint32_t array_size; VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */ + VkImageTiling tiling; /** VkImageCreateInfo::tiling */ VkDeviceSize size; uint32_t alignment; @@ -1489,11 +1490,12 @@ struct anv_image { struct anv_image_view { const struct anv_image *image; /**< VkImageViewCreateInfo::image */ - const struct anv_format *format; /**< VkImageViewCreateInfo::format */ struct anv_bo *bo; uint32_t offset; /**< Offset into bo. */ VkImageAspectFlags aspect_mask; + VkFormat vk_format; + enum isl_format format; VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */ /** RENDER_SURFACE_STATE when using image as a color render target. */ diff --git a/src/vulkan/gen7_cmd_buffer.c b/src/vulkan/gen7_cmd_buffer.c index feed3611805..fa9cb8fa914 100644 --- a/src/vulkan/gen7_cmd_buffer.c +++ b/src/vulkan/gen7_cmd_buffer.c @@ -459,7 +459,7 @@ cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer) anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); struct GEN7_DEPTH_STENCIL_STATE depth_stencil = { - .StencilBufferWriteEnable = iview && iview->format->has_stencil, + .StencilBufferWriteEnable = iview && (iview->aspect_mask & VK_IMAGE_ASPECT_STENCIL_BIT), .StencilTestMask = cmd_buffer->state.dynamic.stencil_compare_mask.front & 0xff, @@ -698,17 +698,22 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) const struct anv_image_view *iview = anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); const struct anv_image *image = iview ? iview->image : NULL; - const bool has_depth = iview && iview->format->depth_format; - const bool has_stencil = iview && iview->format->has_stencil; + + /* XXX: isl needs to grow depth format support */ + const struct anv_format *anv_format = + iview ? anv_format_for_vk_format(iview->vk_format) : NULL; + + const bool has_depth = iview && anv_format->depth_format; + const bool has_stencil = iview && anv_format->has_stencil; /* Emit 3DSTATE_DEPTH_BUFFER */ if (has_depth) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), .SurfaceType = SURFTYPE_2D, - .DepthWriteEnable = iview->format->depth_format, + .DepthWriteEnable = true, .StencilWriteEnable = has_stencil, .HierarchicalDepthBufferEnable = false, - .SurfaceFormat = iview->format->depth_format, + .SurfaceFormat = anv_format->depth_format, .SurfacePitch = image->depth_surface.isl.row_pitch - 1, .SurfaceBaseAddress = { .bo = image->bo, diff --git a/src/vulkan/gen7_state.c b/src/vulkan/gen7_state.c index fe2967c7ef4..a7940ca9e2f 100644 --- a/src/vulkan/gen7_state.c +++ b/src/vulkan/gen7_state.c @@ -214,7 +214,7 @@ genX(image_view_init)(struct anv_image_view *iview, struct GENX(RENDER_SURFACE_STATE) surface_state = { .SurfaceType = anv_surftype(image, pCreateInfo->viewType, false), .SurfaceArray = image->array_size > 1, - .SurfaceFormat = iview->format->surface_format, + .SurfaceFormat = iview->format, .SurfaceVerticalAlignment = anv_valign[image_align_sa.height], .SurfaceHorizontalAlignment = anv_halign[image_align_sa.width], @@ -310,8 +310,7 @@ genX(image_view_init)(struct anv_image_view *iview, anv_surftype(image, pCreateInfo->viewType, true), surface_state.SurfaceFormat = - isl_lower_storage_image_format(&device->isl_dev, - iview->format->surface_format); + isl_lower_storage_image_format(&device->isl_dev, iview->format); surface_state.SurfaceMinLOD = range->baseMipLevel; surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1; diff --git a/src/vulkan/gen8_cmd_buffer.c b/src/vulkan/gen8_cmd_buffer.c index 9614da705e7..965a9c14317 100644 --- a/src/vulkan/gen8_cmd_buffer.c +++ b/src/vulkan/gen8_cmd_buffer.c @@ -695,8 +695,13 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) const struct anv_image_view *iview = anv_cmd_buffer_get_depth_stencil_view(cmd_buffer); const struct anv_image *image = iview ? iview->image : NULL; - const bool has_depth = iview && iview->format->depth_format; - const bool has_stencil = iview && iview->format->has_stencil; + + /* XXX: isl needs to grow depth format support */ + const struct anv_format *anv_format = + iview ? anv_format_for_vk_format(iview->vk_format) : NULL; + + const bool has_depth = iview && anv_format->depth_format; + const bool has_stencil = iview && anv_format->has_stencil; /* FIXME: Implement the PMA stall W/A */ /* FIXME: Width and Height are wrong */ @@ -705,10 +710,10 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) if (has_depth) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BUFFER), .SurfaceType = SURFTYPE_2D, - .DepthWriteEnable = iview->format->depth_format, + .DepthWriteEnable = anv_format->depth_format, .StencilWriteEnable = has_stencil, .HierarchicalDepthBufferEnable = false, - .SurfaceFormat = iview->format->depth_format, + .SurfaceFormat = anv_format->depth_format, .SurfacePitch = image->depth_surface.isl.row_pitch - 1, .SurfaceBaseAddress = { .bo = image->bo, diff --git a/src/vulkan/gen8_state.c b/src/vulkan/gen8_state.c index 5562a252a21..a24eb192493 100644 --- a/src/vulkan/gen8_state.c +++ b/src/vulkan/gen8_state.c @@ -194,7 +194,7 @@ genX(image_view_init)(struct anv_image_view *iview, struct GENX(RENDER_SURFACE_STATE) surface_state = { .SurfaceType = anv_surftype(image, pCreateInfo->viewType, false), .SurfaceArray = image->array_size > 1, - .SurfaceFormat = iview->format->surface_format, + .SurfaceFormat = iview->format, .SurfaceVerticalAlignment = valign, .SurfaceHorizontalAlignment = halign, .TileMode = isl_to_gen_tiling[surface->isl.tiling], @@ -285,8 +285,7 @@ genX(image_view_init)(struct anv_image_view *iview, anv_surftype(image, pCreateInfo->viewType, true), surface_state.SurfaceFormat = - isl_lower_storage_image_format(&device->isl_dev, - iview->format->surface_format); + isl_lower_storage_image_format(&device->isl_dev, iview->format); surface_state.SurfaceMinLOD = range->baseMipLevel; surface_state.MIPCountLOD = MAX2(range->levelCount, 1) - 1;