From: Maciej W. Rozycki Date: Tue, 14 Sep 2010 23:49:04 +0000 (+0000) Subject: opcodes/ X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f6690563bb1749a0c97b55b8f781a57a211597d5;p=binutils-gdb.git opcodes/ * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb". gas/testsuite/ * gas/mips/mips32r2-sync.d: New test for MIPS32r2 "sync" instruction variants. * gas/mips/octeon@mips32r2-sync.d: Likewise, Octeon version. * gas/mips/mips32r2-sync.s: Source for the new test. * gas/mips/mips.exp: Run the new test. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 83ff1bdf0f4..2af2d3c7d33 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2010-09-14 Maciej W. Rozycki + + * gas/mips/mips32r2-sync.d: New test for MIPS32r2 "sync" + instruction variants. + * gas/mips/octeon@mips32r2-sync.d: Likewise, Octeon version. + * gas/mips/mips32r2-sync.s: Source for the new test. + * gas/mips/mips.exp: Run the new test. + 2010-09-13 Kai Tietz * gas/pe/pe.exp: Add x64 SEH tests. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index b5f31fea671..34fd01aef74 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -877,6 +877,8 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "mips16-vis-1" run_dump_test "call-nonpic-1" run_dump_test "mips32-sync" + run_dump_test_arches "mips32r2-sync" \ + [mips_arch_list_matching mips32r2] if $has_newabi { run_dump_test "cfi-n64-1" } diff --git a/gas/testsuite/gas/mips/mips32r2-sync.d b/gas/testsuite/gas/mips/mips32r2-sync.d new file mode 100644 index 00000000000..cedcd58ace7 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2-sync.d @@ -0,0 +1,29 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS32r2 sync instructions +#as: -32 +#source: mips32r2-sync.s + +# Check MIPS32r2 sync instructions assembly and disassembly + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0000000f sync +[0-9a-f]+ <[^>]*> 0000008f sync 0x2 +[0-9a-f]+ <[^>]*> 0000010f sync_wmb +[0-9a-f]+ <[^>]*> 0000020f sync 0x8 +[0-9a-f]+ <[^>]*> 0000040f sync_mb +[0-9a-f]+ <[^>]*> 0000044f sync_acquire +[0-9a-f]+ <[^>]*> 0000048f sync_release +[0-9a-f]+ <[^>]*> 000004cf sync_rmb +[0-9a-f]+ <[^>]*> 0000060f sync 0x18 +[0-9a-f]+ <[^>]*> 0000000f sync +[0-9a-f]+ <[^>]*> 0000008f sync 0x2 +[0-9a-f]+ <[^>]*> 0000010f sync_wmb +[0-9a-f]+ <[^>]*> 0000020f sync 0x8 +[0-9a-f]+ <[^>]*> 0000040f sync_mb +[0-9a-f]+ <[^>]*> 0000044f sync_acquire +[0-9a-f]+ <[^>]*> 0000048f sync_release +[0-9a-f]+ <[^>]*> 000004cf sync_rmb +[0-9a-f]+ <[^>]*> 0000060f sync 0x18 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips32r2-sync.s b/gas/testsuite/gas/mips/mips32r2-sync.s new file mode 100644 index 00000000000..345854cd597 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2-sync.s @@ -0,0 +1,26 @@ +# Source file to test assembly of MIPS32r2 sync instructions. + + .text +foo: + sync + sync 2 + sync_wmb + sync 8 + sync_mb + sync_acquire + sync_release + sync_rmb + sync 0x18 + sync 0 + sync 2 + sync 4 + sync 8 + sync 0x10 + sync 0x11 + sync 0x12 + sync 0x13 + sync 0x18 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/octeon@mips32r2-sync.d b/gas/testsuite/gas/mips/octeon@mips32r2-sync.d new file mode 100644 index 00000000000..aaf835db25c --- /dev/null +++ b/gas/testsuite/gas/mips/octeon@mips32r2-sync.d @@ -0,0 +1,29 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS32r2 sync instructions +#as: -32 +#source: mips32r2-sync.s + +# Check MIPS32r2 sync instructions assembly and disassembly (Octeon). + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0000000f sync +[0-9a-f]+ <[^>]*> 0000008f synciobdma +[0-9a-f]+ <[^>]*> 0000010f syncw +[0-9a-f]+ <[^>]*> 0000020f sync 0x8 +[0-9a-f]+ <[^>]*> 0000040f sync_mb +[0-9a-f]+ <[^>]*> 0000044f sync_acquire +[0-9a-f]+ <[^>]*> 0000048f sync_release +[0-9a-f]+ <[^>]*> 000004cf sync_rmb +[0-9a-f]+ <[^>]*> 0000060f sync 0x18 +[0-9a-f]+ <[^>]*> 0000000f sync +[0-9a-f]+ <[^>]*> 0000008f synciobdma +[0-9a-f]+ <[^>]*> 0000010f syncw +[0-9a-f]+ <[^>]*> 0000020f sync 0x8 +[0-9a-f]+ <[^>]*> 0000040f sync_mb +[0-9a-f]+ <[^>]*> 0000044f sync_acquire +[0-9a-f]+ <[^>]*> 0000048f sync_release +[0-9a-f]+ <[^>]*> 000004cf sync_rmb +[0-9a-f]+ <[^>]*> 0000060f sync 0x18 + \.\.\. diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5e522c6f396..992a740aad8 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2010-09-14 Maciej W. Rozycki + + * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire", + "sync_mb", "sync_release", "sync_rmb" and "sync_wmb". + 2010-09-10 Pierre Muller * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index f276a0041ee..6dc615f38d7 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -1335,6 +1335,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"syncs", "", 0x0000018f, 0xffffffff, INSN_SYNC, 0, IOCT }, {"syncw", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, IOCT }, {"syncws", "", 0x0000014f, 0xffffffff, INSN_SYNC, 0, IOCT }, +{"sync_acquire", "", 0x0000044f, 0xffffffff, INSN_SYNC, 0, I33 }, +{"sync_mb", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I33 }, +{"sync_release", "", 0x0000048f, 0xffffffff, INSN_SYNC, 0, I33 }, +{"sync_rmb", "", 0x000004cf, 0xffffffff, INSN_SYNC, 0, I33 }, +{"sync_wmb", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, I33 }, {"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2|G1 }, {"sync", "1", 0x0000000f, 0xfffff83f, INSN_SYNC, 0, I32 }, {"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I2 },