From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 26 Jun 2019 11:16:29 +0000 (+0100)
Subject: add DAXPY example
X-Git-Tag: convert-csv-opcode-to-binary~4395
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f66d5c051363312550e950334d8178a3f2144bbe;p=libreriscv.git

add DAXPY example
---

diff --git a/simple_v_extension/appendix.mdwn b/simple_v_extension/appendix.mdwn
index 55e1cd586..d817cc722 100644
--- a/simple_v_extension/appendix.mdwn
+++ b/simple_v_extension/appendix.mdwn
@@ -1587,3 +1587,7 @@ RVV version:
         add a3, a3, a2        # Add index of zero byte
         sub a0, a3, a0        # Subtract start address+bump
         ret 
+
+## DAXPY
+
+[[!inline raw="yes" pages="simple_v_extension/daxpy_example" ]]
diff --git a/simple_v_extension/daxpy_example.mdwn b/simple_v_extension/daxpy_example.mdwn
new file mode 100644
index 000000000..587d9354a
--- /dev/null
+++ b/simple_v_extension/daxpy_example.mdwn
@@ -0,0 +1,15 @@
+    # a0 is n, a1 is ptr to x[0], a2 is ptr to y[0], fa0 is a
+     VBLK.REG[0] = {type: F, regkey: a3, regidx: a3, elwidth: dflt}
+     VBLK.REG[1] = {type: F, regkey: a7, regidx: a7, elwidth: dflt}
+     VBLK.MVL = 4
+    loop:
+     setvl  t0, a0          # vl = t0 = min(a0, MVL))
+     ld     a3, a1          # load 4 registers a3-6 from x
+     slli   t1, t0, 3       # t1 = vl * 8 (in bytes)
+     ld     a7, a2          # load 4 registers a7-10 from y
+     add    a1, a1, t1      # increment pointer to x by vl*8
+     fmadd  a7, a3, fa0, a7 # v1 += v0 * fa0 (y = a * x + y)
+     sub    a0, a0, t0      # n -= vl (t0)
+     st     a7, a2          # store 4 registers a7-10 to y
+     add    a2, a2, t1      # increment pointer to y by vl*8
+     bnez   a0, loop        # repeat if n != 0