From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Fri, 20 Jan 2012 22:00:11 +0000 (+0100)
Subject: Use new verilog.convert API
X-Git-Tag: 24jan2021_ls180~3273
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f6aa95a4d09b403880cfc3068a57ba4bc315737a;p=litex.git

Use new verilog.convert API
---

diff --git a/top.py b/top.py
index be0bba67..d865a3c5 100644
--- a/top.py
+++ b/top.py
@@ -24,12 +24,11 @@ def get():
 	csrcon0 = csr.Interconnect(wishbone2csr0.csr, [uart0.bank.interface])
 	
 	frag = autofragment.from_local()
-	vns = tools.Namespace()
-	src_verilog = verilog.convert(frag,
+	src_verilog, vns = verilog.convert(frag,
 		{clkfx_sys.clkin, reset0.trigger_reset},
 		name="soc",
 		clk_signal=clkfx_sys.clkout,
 		rst_signal=reset0.sys_rst,
-		ns=vns)
+		return_ns=True)
 	src_ucf = constraints.get(vns, clkfx_sys, reset0, norflash0, uart0)
 	return (src_verilog, src_ucf)