From: lkcl <lkcl@web>
Date: Sat, 23 Jul 2022 10:52:03 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1094
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f71cf27dc9e4c0c94ffcc5b77a4c2ff42fa32411;p=libreriscv.git

---

diff --git a/openpower/sv/executive_summary.mdwn b/openpower/sv/executive_summary.mdwn
index 657ad6a09..b7f2f41e4 100644
--- a/openpower/sv/executive_summary.mdwn
+++ b/openpower/sv/executive_summary.mdwn
@@ -9,7 +9,7 @@ Power ISA.
 
 It is extremely important to think of Simple-V as a 2-Dimensional ISA:
 instructions vertical and registers horizontal otherwise it will be
-difficult to understand.
+difficult to grasp and appreciate the RISC simplicity.
 
 Simple-V is **not RISC-V and is not RISC-V Vectors**. NEC SX Aurora,
 RVV and Simple-V are all based on Cray-style Vectors hence the similarity,