From: lkcl <lkcl@web>
Date: Thu, 30 Sep 2021 20:46:18 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3796
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f7311258cf61308eeeaaf86d44b83b31ca8a7d1d;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd/logicops.mdwn b/3d_gpu/architecture/dynamic_simd/logicops.mdwn
index f44712a19..bb26d2ac8 100644
--- a/3d_gpu/architecture/dynamic_simd/logicops.mdwn
+++ b/3d_gpu/architecture/dynamic_simd/logicops.mdwn
@@ -10,13 +10,15 @@ These are **not** the same as bitwise logical operations equivalent to:
      for i in range(64):
          result[i] = a[i] xor b[i] # 2 operands
 
+The above returns a 64 bit result for 64 bit inputs.
+
 they are instead SIMD versions of:
 
      result = 0 # initial value (single bit)
      for i in range(64):
          result = result xor a[i] # one operand
 
-Each of the logic ops, "some bool any all xor" are a single bit for
+Each of the logic ops, "some bool any all xor" are a **single bit** for
 scalar, but for Partitioned SIMD produce one bit per lane.
 
 # Requirements