From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 11 Apr 2020 10:32:44 +0000 (+0100)
Subject: test additional instructions
X-Git-Tag: div_pipeline~1435^2~18
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f742d1f10c540c86d9784a29d77b0f28f40410a1;p=soc.git

test additional instructions
---

diff --git a/src/soc/experiment/score6600.py b/src/soc/experiment/score6600.py
index 2e7602ca..7303a7e6 100644
--- a/src/soc/experiment/score6600.py
+++ b/src/soc/experiment/score6600.py
@@ -298,7 +298,7 @@ class CompUnitBR(CompUnitsBase):
         # hand the same operation to all units
         for alu in self.units:
             comb += alu.oper_i.eq(self.oper_i)
-            comb += alu.imm_i.eq(self.imm_i)
+            #comb += alu.imm_i.eq(self.imm_i)
 
         return m
 
@@ -1104,7 +1104,7 @@ def scoreboard_sim(dut, alusim):
             instrs.append((7, 6, 6, 2, 0, 0, (0, 0)))
             instrs.append((1, 7, 2, 2, 0, 0, (0, 0)))
 
-        if False:
+        if True:
             instrs.append((2, 3, 3, InternalOp.OP_ADD, Function.ALU,
                            0, 0, (0, 0)))
             instrs.append((5, 3, 3, InternalOp.OP_ADD, Function.ALU,